GPIO pin mapping

Martin,

In most cases, the GIO register bank for each peripheral follows the same format, and you will find a definition in the register header file for the peripheral's GIO port.

For example, in reg_spi.h line 79:

/** @def spiPORT1
*   @brief SPI1 (MIBSPI - Compatibility Mode) GIO Port Register Pointer
*
*   Pointer used by the GIO driver to access I/O PORT of SPI1
*   (use the GIO drivers to access the port pins).
*/
#define spiPORT1 ((gioPORT_t *)0xFFF7F418U)

 This 'spiPORT1' would be the pointer to the gioPORT_t structure that you pass into functions such as

void gioSetBit(gioPORT_t *port, uint32 bit, uint32 value)

Some of the gio functions take the raw bit mask but others like the one above take the bit positon and the value 1,0.  You may need to look at the file gio.c to determine the convention.

Best Regards,

Anthony

To clarify,

What I'm looking for though is the mapping between the bit number and the actual pin.  For example, on SPI2 on RM46L852, there's SPI2CLK, SPI2SIMO, SPI2NCS[0], SPI2NCS[1], SPI2SOMI, etc.  I can't tell if setting bit '3' high (for example), in gioSetBit(spiPORT2, 3, 1), maps to CLK, SIMO, SOMI, NCS[0], etc, and in turn if that'll control bga pin D3, D1, N3, or E2.

HET ports are easy, HET1[0] is bit 0, etc, but the SPI and some others there's no clear mapping or order, and there's no quick fix for SPI2 as on the RM46L852, its the only peripheral on those pins.

Cheers,

Martin

Martin,

The definitive way to get the bit position is to check the TRM, in the "Multi-Buffered Serial Peripheral Interface Module (MibSPI)
with Parallel Pin Option (MibSPIP)" chapter, the control registers section lists all of the registers and the bit fields.

If you go to the first pin control register SPIPC0 you can see the mapping.  It's the same for all the PCx registers.

Second way is to check the 'enum spiPinSelect' in the header file 'spi.h'.    It's got all the pins enumerated so you can use the names there in your code.

For the mapping to BGA pins, it's a little more complicated because of the IO Muxing Module,  (chapter 4 in the TRM covers this, and in HalCoGen it is the "PINMUX" tab).

If the SPI functions are multiplexed with other peripheral functions, you will need to make sure that the IO muxing module is configured to select the SPI pin you are looking for.

Aside from the pin muxing, the actual ball # that the function comes out onto is listed in the Terminal Functions table of the Datasheet.    Make sure to look at the terminal functions table because if you just look at the pinout diagram (figure 2-2) only the default function is listed.

For SPI, you should see something like this in the terminal functions table, with the ball # in the column "337 ZWT".

>> Second way is to check the 'enum spiPinSelect' in the header file 'spi.h'.    It's got all the pins enumerated so you can use the names there in your code.

This shows as SPI_PIN_CLK = 9, SPI_PIN_CS0 = 0, etc.  So then I assume the chip select [0] line I want would be bit 0 (SPI2NCS0) then in this case, mapping to N3?  And I assume too that CS2 through CS7 are 'pins' that don't actually go to physical pins.  I can map the pin to the BGA ball #, but I think this is what I wanted, and probably generically applied to just about any other interface.

So, bluntly, gioSetBit(spiPORT2, SPI_PIN_CS0, VALUE); will set pin N3 to the value I want, yes? (Assuming all nicely configured as gpio in HalCoGen)

The TRM link was broken, but I found the RM46 TRM, spnu514.pdf.

Thanks for your time,

Martin

Hi Anthony,

Excellent, thank you for your help!

Cheers,

Martin