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Problem with htucdcp_t struct from HALCoGen 03.05.00

Other Parts Discussed in Thread: HALCOGEN

Hello,

to access the HTU RAM HalCoGen defines a structure named "htucdcp_t" in file reg_htu.h:

typedef volatile struct htucdcp
{
uint32 CFADDRA; /** 0x100 */
uint32 CFADDRB; /** 0x104 */
uint32 CFCOUNT; /** 0x108 */
} htucdcp_t;
 
When I try to access CFCOUNT of HTU channel0 all is ok. If I access CFCOUNT of HTU channel1 is returns a wrong counter value.
I believe that is because HTU places the channel1 data at address offset 0x110 and not 0x10C. Here is a screenshot of the memory:
So in my opinion the structure shall be defined like this:
typedef volatile struct htucdcp
{
uint32 CFADDRA; /** 0x100 */
uint32 CFADDRB; /** 0x104 */
uint32 CFCOUNT; /** 0x108 */
uint32 Reserved; /** 0x10C */
} htucdcp_t;
 
Please let me know if my unterstanding is correct.
Best Regards
Christian
  • Christian,

    Yes you are right.  I think we are missing a table in our TRM as well.

    There are 8 htudcp's at offsets  0xFF4E0000, 0xFF4E0010, 0xFF4E0020, 0xFF4E0030, 0xFF4E0040, 0xFF4E0050, 0xFF4E0060, and 0xFF4E0070.

    There are 8 htucdcp's at offsets  0xFF4E0100, 0xFF4E0110, 0xFF4E0120, 0xFF4E0130, 0xFF4E0140, 0xFF4E0150, 0xFF4E0160, and 0xFF4E0170.

    So the htucdcp's are also aligned to boundaries at 0x10 hex granularity.

    Sorry for the trouble.   I'll make sure to file an issue report against HalCoGen and the TRM.

    -Anthony