Interrupt vector handling: 1 MCU 3 SW project

Hi Dejan,

Ah I have a ton of quesitons for you ::

When you say that the vectors for "Bootloader" work you mean just the IRQ vectors, correct?

Or is "FORK" somehow redirecting the other exception vectors, like UNDEF, between Bootloader and FW?

Do you *want* FORK to handle all the other exceptions except for IRQ?   Also do you want FORK to always be the primary Reset handler?

Regarding the limitation of HW dispatch, VIM has the ability to map the priority of the interrupt requests

And the Channels can be enabled/disabled through VIM so nesting with priority should also be possible by temporarily disabling the interrupts below the current level before enabling nesting.

Best Regards,

Anthony

Hi Anthony,

Yesterday I have read a little more the documentation and topic forums and I notice that exception vector for RM48L952 can't be move. It can be on address 0x0 or 0xFFFF0000, but 0xFFFF0000 is not possible on RM48L952.
So each SW project has to have common exception vector. Is this correct?

So if I set up in sys_link.cmd   as example:

/*----------------------------------------------------------------------------*/
/* Memory Map */
MEMORY{
VECTORS (X) : origin=0x00002000 length=0x00000020
FLASH0 (RX) : origin=0x00002020 length=0x0017FFE0
FLASH1 (RX) : origin=0x00180000 length=0x00180000
STACKS (RW) : origin=0x08000000 length=0x00002000
RAM (RW) : origin=0x08002000 length=0x0003ED00
}

/*----------------------------------------------------------------------------*/
/* Section Configuration */
SECTIONS{
.intvecs : {} > VECTORS
.text : {} > FLASH0 | FLASH1
.const : {} > FLASH0 | FLASH1
.cinit : {} > FLASH0 | FLASH1
.pinit : {} > FLASH0 | FLASH1
.bss : {} > RAM
.data : {} > RAM
.sysmem : {} > RAM
}

Will not work.  I have erased the whole flash and flash it with this settings and of course didnt work, because address 0x0 had none value.
On STM32 there is some special register which you say where your exception vector is. I think that this option is not available on RM48L952.

So to answer first question, i thought that Bootloader was working but you are right only IRQ are working. Because FORK started, and than called Bootloader and in bootloader I use only IRQ interrupts. And IRQ are set to HW vector interrupt.

So what kind procedure would you suggest that I simulate this kind way of integration? That each SW project has its own exception vector. 
So when Fork is working, reset is address of Fork, When Bootloader is working, reset is bootloader, and so on.

To keep in mind:
What can happen if bootloader is updating from USB FW. But in that time it mustn't rewrite exception vectors, in case of power loss or some other problem. 

Thx,
BR, Dejan 

Hi Anthony,

First thank you for your ideas. I think i'm going to simplify the design.

My starting point will be always Fork, and than Fork decides if it goes to bootloader, or FW. Calls _c_int00 of each projects.

All project will use common exception vectors which are going be handled by the fork sw.
Question: So in bootloader SW and FW SW sys_invec.asm must look like so:

b _c_int00
undefEntry
b #0x4;b undefEntry
svcEntry
b #0x8;b svcEntry
prefetchEntry
b #0x0C;b prefetchEntry
b #0x10;b _dabort
reservedEntry
b reservedEntry
b #0x18;ldr pc,[pc,#-0x1b0]
b #0x1C;ldr pc,[pc,#-0x1b0]

IRQ are goning to be hardware vector and each SW project will overwrite VIMRAM vector table.

So far now when im in debug, everthing works, but on power-up it doesnt. Fork calls FW, FW enables interrupts and when handling first interrupt i get esm group 2 interrupt.
In FW in vim vector table I have for irq interrupt irqDispacher function which executes the highest interrupt also its supports nesting.
If i ignore esm interrupt or put normal ISR function without irqDispacher it works also on power-up.

irqDispacther is done like so, expect that address of asm function is not in sys_invec.asm but in vim vector table.
http://e2e.ti.com/support/microcontrollers/hercules/f/312/t/164944.aspx 

Sometimes with dispatcher also works on power-up, if I reset the board very quickly. 

Setup sys_link.cmd

Fork: exception vectors are at address 0x0

BW and FW: exception vectors are on other address (that we dont overwrite forks settings)