Hi,
I do not know whether this is a known bug or not, but I could not found the issue in the errata. We are using RM48 for one of our projects and we found something interesting.
Circumstances:
- The code is running from the internal flash and we are using an external SDRAM through EMIF. .bss and .data are located here.
- 1 timer and an USB interrupt is used. ( USB host MST )
- Most of the time the problem occurs during an USB read ( Reading data from MST )
- The PLL is running on 200MHz and the VCLK is 100MHz
- We have a small OS which is running on several system without any problem.
- We are using CCS 5.2 and compiler version 4.9.1
The OS context switch part looks like this:
- stmdb sp!,{r4-r11,lr} ; save registers
...- ldmia sp!,{r4-r11,pc} ; restore registers
As you can see we store r4-r11 and r14 on the stack using STM instruction but sometimes we can see that the last two registers are swapped, so instead of seeing r4-r10, r11, lr we can see r4-r10, lr, r11 on the stack, as a consequence when registers are read back from the stack (which is done by LDM for r4-r11,pc) the system causes a prefetch abort as r11 will be placed to PC.
After a short analysis we have found that if we split STM to 2-3 groups (e.g.: STMDB sp!,{r11,lr); STMDB sp!,{r8-r10}; STMDB sp!,{r4-r7}) then it works perfectly and the problem never occurs. Strangely none of the compiled codes by CodeComposer uses STM for more than 6 registers in one go. Is it possible that using more than 6 register could cause some trouble?
I tried to add a debug code to catch the problem:
test_smtdb:
.asmfunc
start:
mov sp,#0x80000000
orr sp,sp,#0x6000
mov r0,#1
mov r1,#2
mov r3,#4
mov r4,#5
mov r5,#6
mov r6,#7
mov r7,#8
mov r8,#9
mov r9,#10
mov r10,#11
mov r11,#12
mov r12,#13
start2:
mov r2,#3
stmdb sp!,{r0-r12,lr} ; save registers
mov r0,#0
mov r1,#0
mov r2,#0
mov r3,#0
mov r4,#0
mov r5,#0
mov r6,#0
mov r7,#0
mov r8,#0
mov r9,#0
mov r10,#0
mov r11,#0
mov r12,#0
ldmia sp!,{r0-r12,lr} ; restore registers
cmp r0,#1
bne error_func
cmp r1,#2
bne error_func
cmp r2,#3
bne error_func
cmp r3,#4
bne error_func
cmp r4,#5
bne error_func
cmp r5,#6
bne error_func
cmp r6,#7
bne error_func
cmp r7,#8
bne error_func
cmp r8,#9
bne error_func
cmp r9,#10
bne error_func
cmp r10,#11
bne error_func
cmp r11,#12
bne error_func
cmp r12,#13
bne error_func
mov r2,#0x80000000
orr r2,r2,#0x2100
cmp sp,r2
blt start
b start2
mov pc,lr
After startup this code is executed only. In this case there is no USB interrupt just the timer interrupt, but no prefetch problem occurs.
Do you have any suggestions what and where to check?
Thank you in advance!
Kind Regards,
Peter Begella
Update:
- Moving .bss section into the internal RAM solves the problem or at least hides it. But this is not an option for us.
