Is there an error in the LM4F120H5QR documentation regarding the ADC Digital Comparator trigger output?
The LM4F120H5QR Data Sheet in section 13.3.7.1, Output Functions, states: "Each comparator has two possible output functions: processor interrupts and triggers."
There section also contains a description of the Interrupt outputs, but lacks a similar description of the Trigger outputs.
The description of the ADC Digital Comparator Control registers ( ADCDCCTLn starting at offset 0x0E00) defines the bits for configuring Interrupts but not any corresponding bits for configuring triggers.
The hw_adc.h file contains bit masks for configuring the ADC Digital Comparator Control registers (for example ADC_DCCTL0_CIE or ADC_DCCTL0_CIM_M) for interrupts and also for corresponding bits for triggers: ADC_DCCTL0_CTE, ADC_DCCTL0_CTC_M, etc. There are no corresponding trigger bits defined in the LM4F120H5QR Data Sheet.
Is the LM4F120H5QR Data Sheet incorrect in stating that the Digital Comparator can output triggers?
Is the LM4F120H5QR Data Sheet incorrect in the definition of the ADC Digital Comparator Control (ADCDCCTLn) registers?
If the Digital Comparator can output triggers what do the triggers do? I have seen RTOS documentation of the ADC which states that the trigger is a "PWM fault condition".
Donald Rich