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TIMER --> PWM_MODE --> MRSU Bit has no effect

Hello,

i need your help:

part: LM4F120H5QR, Launchpad

my question about the MRSU bit from the GPTMTAMR Register > Datasheet:

0: Update the GPTMTAMATCHR register and the GPTMTAPR register, if used, on the next cycle

1: Update the GPTMTAMATCHR register and the GPTMTAPR register, if used, on the next timeout.


____> Next Cycle ist the Clock Cycle? if yes then an update of the GPTMTAMATCHR register must show an immediate effect !!?

But my problem ist, the update always occurs only in the next period, how i can change this?

Timing:

time 0: CCP Pin low--> HIgh

time 300us: calculate and update MATCH Register

time 400us-3000us: Pulse width  --> CCP Pin  Low

time 4000us:--> new periode

 

thank you for help,

Walter

  • I am looking into this now.  How are you verifying when the MATCH register update takes place relative to the PWM period/duty cycle?

    --Bobby

  • Hello Bobby,

    Timer0B_IntHandler(void)                 // Interrupt event PWM LOW -> HIGH  (scope ,ch1, yellow)
    {
        ROM_TimerIntClear(TIMER0_BASE, TIMER_CAPB_EVENT);
     
        if (tp==10000)
           {
                tp=40000;                         // set long pulse-width
                LED_D_ON;                     // scope ch2=HIGH, look  screenshot
           }
        else
           {
                tp=10000;                         // set short pulse-width
                LED_D_OFF;                  // scope ch2= LOW,  
           }
     
        SysCtlDelay(40);
        TimerMatchSet(TIMER0_BASE,TIMER_B, tp);     // update MATCH Register
     
    }

    scope screenshot:

    thank you,

    Walter

  • Thanks, I can see how you are testing this.  I am working on duplicating the issue here locally.  Would you be able to provide a snapshot of code that shows how you are setting the timers up?

    Thanks,
    Bobby 

  • Hello Bobby,

    the timer init:

    [  i hope you will find an resolution :-)  ]

    best regards

    Walter

    //------------------------------------------------------------------------------------------------------

    void timer0B__pwm_init(void){    

    unsigned long     ulPeriod;
     
         // TIMER0_B   PWM PIN: PF1    ---------------------------------
         SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
         GPIOPinConfigure(GPIO_PF1_T0CCP1);
         GPIOPinTypeTimer(GPIO_PORTF_BASE, GPIO_PIN_1);
         GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_STRENGTH_8MA_SC, GPIO_PIN_TYPE_STD);
     
         TimerConfigure(TIMER0_BASE, TIMER_CFG_SPLIT_PAIR  | TIMER_CFG_B_PWM);
         TimerPrescaleSet(TIMER0_BASE,TIMER_B, 3);    // Timer Prescale=3
         TimerControlLevel(TIMER0_BASE,TIMER_B, 1);    // PWM invertieren
     
         // TAMRSU Bit setzen
        // HWREG(TIMER0_BASE + 4) |= 0x400;
     
         TimerControlStall(TIMER0_BASE, TIMER_B, true);
     
         ulPeriod = SysCtlClockGet() / 1000;
         TimerLoadSet(TIMER0_BASE, TIMER_B, ulPeriod-1);     // 40000 is the maximum
         TimerMatchSet(TIMER0_BASE,TIMER_B, 20000);          // 0.....39999

         TimerControlEvent(TIMER0_BASE, TIMER_B, TIMER_EVENT_POS_EDGE);   
         IntEnable(INT_TIMER0B);
         TimerIntEnable(TIMER0_BASE, TIMER_TIMB_TIMEOUT | TIMER_CAPB_EVENT);
     
         TimerEnable(TIMER0_BASE, TIMER_B);
    }

  • I have duplicated the issue, and I believe I understand what is happening.  The setup code that you provided is inverting the PWM signal with the following call:

    TimerControlLevel(TIMER0_BASE,TIMER_B,1);

    A positive edge capture event is enabled with the following call:

    TimerControlEvent(TIMER0_BASE, TIMER_B, TIMER_EVENT_POS_EDGE);

    The edge-capture event is triggered from the CCP output, which is after the inversion (if enabled) takes place.  So, a rising edge event of an inverted PWM signal takes place when the timer match occurrs(i.e. PMW signal is de-asserted, inverted CCP signal is asserted), and the falling edge event takes place when the timer is reloaded (i.e. PMW signal is asserted, inverted CCP signal is de-asserted).

    This means that the interrupt is occurring after the match has been detected, and any write to the MATCH register may not have any impact until the next period, resulting in the waveform that you are seeing.

    If you change the edge event as follows:

    TimerControlEvent(TIMER0_BASE, TIMER_B, TIMER_EVENT_NEG_EDGE);

    This should get the interrupt occurring at the right time relative to the timer reload, but before the match has occurred, so that the update to the MATCH register will take affect in the current period.

    --Bobby

  • Hello Bobby,

    well works fine (with and without MRSU bit)!!

    But one think i want say you:

    1000 +points for you and the other helpers.  

    For us  is it very important to know, that we have a reliable company on our side.

    that's not something that can be taken for granted.

    best regards

    Walter