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moving code from CONCERTO (Cortex-M3) to HERCULES (RM46)

Jacek Figat
Prodigy 20 points

Other Parts Discussed in Thread: RM46L852, F28M35H52C, HALCOGEN

Hello everyone,

I don't have big experience in programing, but I have task to do...

I need 'to move' code from Cortex-M3 part of CONCERTO (F28M35H52C) to HERCULES (RM46L852). Could you tell me if it is possible and if 'yes' how to start?

Regards,

Jacek

  • 0
    TI__Expert 4620 points

    Hi Jacek,

    We have recieved your query. We will get back to you at the earliest possible.

    Thanks,

    Praveen

  • 0 in reply to Praveen Kumar Ravichandran
    TI__Expert 4620 points

    Hi Jacek,

    Its certainly possible, but there are different ways to achieve the same. The best we can suggest is to use Halcogen to get the base project done for RM46L852, which will give the framework for system level changes, on top you can add the IP configuration code and bundle it.

    Regards,
    Praveen

  • 0 in reply to Praveen Kumar Ravichandran
    Prodigy 20 points

    Thank you Praveen!

    I read that Cortex-R uses ARM, Thumb and Thumb2, but Cortex-M uses only Thumb2 instruction set. Is that big advantage for Cortex-R? Do you thing code execution time will be shorter in Cortex-R?

    Regards,

    Jacek

  • 0 in reply to Jacek Figat
    TI__Mastermind 23000 points

    Hi Jacek,

    Instruction set is only one component to performance of a processor core.  Dependent on application, some applications will have faster execution in ARM while others will be faster in Thumb-2.  In my experience it is not uncommon to see a +/-5% range of performance variation between well optimized ARM and Thumb-2 code for the same application.  ARM retains the advantage of backwards compatibility to existing ARM7, 9, 10, and 11 based solutions, but this becomes less of an advantage now that Thumb-2 has matured over last ~8 years.

    As compared to a Cortex M3, the Cortex R4 has several performance enhancements:

    • Deeper pipeline (8 stages on R4 vs. 3 stages on M3) which can enable higher frequency performance
    • Deeper instruction prefetch buffer
    • Branch prediction/speculative fetch
    • Wider busses (64b vs. 32) to support higher data throughput
    • Limited dual issue of instruction - in some cases two instructions can complete in the same clock cycle
    • SIMD DSP extensions which can help in audio and video processing
    • Single/dual precision floating point unit
    These performance enhancements tend to give the R4 an advantage in executing computational benchmarks, from 15%-50% with both cores operating at the same frequency.  However, the M3 will have an advantage in access time to peripherals as well as a smaller size and power footprint.  In general we can say that the R4 will execute an application in less time than an M3 when running at the same frequency, but this will not be true for every application.
    Regards,
    Karl