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Ethernet Design confusions

Other Parts Discussed in Thread: TMS570LS3137, TMS570LS1227, DP83640

Hi:

I have a confussion about the RMII and MII mode about the Enthernet design: I find some of the information about the RMII and MII, it says that RMII is a simpler way to implement the communication of the Enthernet, RMII just save half of the signal lines compare to the MII mode, well, does it means the RMII lines in the tms570LS3137 HDK schematics like RMII_CRS_DV, RMII_RXER is not just RMII lines, if I choose the MII mode in the promgram, ther are also serve as MII_CRS_DV and MII_RXER.Is that correct?

Besides, I noticed that you stronly recommend to add some pull up or down resistors to RXD_2 ....and some other signals, why not add them in the TMS570LS3137 HDK directly?

At last, I find you suggest that do not use the RMII mode in porduction in the TMS570LS3137 Control Card schematics, but you just design it in the RMII mode, why you suggest not use the RMII, is that unstable with the TMS570LS3137 MCU? why you design it in RMII mode?

Regards,

yong

  • Yong,

    I'm checking with our Ethernet expert and I will be back to you as soon as possible.

  • yong zhang2 said:

    Hi:

    I have a confussion about the RMII and MII mode about the Enthernet design: I find some of the information about the RMII and MII, it says that RMII is a simpler way to implement the communication of the Enthernet, RMII just save half of the signal lines compare to the MII mode, well, does it means the RMII lines in the tms570LS3137 HDK schematics like RMII_CRS_DV, RMII_RXER is not just RMII lines, if I choose the MII mode in the promgram, ther are also serve as MII_CRS_DV and MII_RXER.Is that correct?

    Besides, I noticed that you stronly recommend to add some pull up or down resistors to RXD_2 ....and some other signals, why not add them in the TMS570LS3137 HDK directly?

    At last, I find you suggest that do not use the RMII mode in porduction in the TMS570LS3137 Control Card schematics, but you just design it in the RMII mode, why you suggest not use the RMII, is that unstable with the TMS570LS3137 MCU? why you design it in RMII mode?

    HW: There might be some timing issues at extreme conditions for RMII. So, we remove that from our datasheet. The control card was designed a long time before we close the timings on datasheet. Another device, TMS570LS1227, which is pin compatiable with TMS570LS3137 but has smaller ram and flash, supports RMII in the datasheet.

    Regards,

    yong

  • Hi,Haixiao

    Thanks very much for answering.

    There is another question, in the TMS570LS31 HDK WIKI page http://processors.wiki.ti.com/index.php/TMS570LS31x_HDK_Kit, I got the schematic about the hardware design(designing data on the schematic is Monday, August 13,2012), there is another version of schematic about the TMS570LS3137 HDK(the designing date is Tuesday, March 05, 2013).

    Well, in the page Ethernet PHY & Conn, the version of 2013 have sentences added compare to the version 2012. It says that Strongly Recommend add a 2.2K ohms pull-down resistors to RXD_2 and RXD_3 signals in pin43,44(RXD_3and RXD_2) of the DP83640 and add a pull-up resistors in pin40(CRS/CRS_DV) of the DP83640. Do you find some errors with the TMS570 about designing like the 2012 version? Why the resistors is recommendded to add?

    If I design a new board, should I add the 3 resistors mentioned in the 2013 version? Or just design it like the schematic shows in the 2012 version?

    Regards,

    yong

  • yong zhang2 said:
    I have a confussion about the RMII and MII mode about the Enthernet design: I find some of the information about the RMII and MII, it says that RMII is a simpler way to implement the communication of the Enthernet, RMII just save half of the signal lines compare to the MII mode, well, does it means the RMII lines in the tms570LS3137 HDK schematics like RMII_CRS_DV, RMII_RXER is not just RMII lines, if I choose the MII mode in the promgram, ther are also serve as MII_CRS_DV and MII_RXER.Is that correct?

    RMII is a reduced pincount interface compared to MII, which is it's main benefit.  It has some drawbacks, mainly that the clock frequency is 50MHz instead of 25MHz, and that there is a resynchronization on the rx data which adds 'jitter' to the timing of receive data.  That can be a drawback for time-synchronized ethernet protocols, but with the DP83640 phy we used on the HDK this is not a concern because that phy includes timestamping in the phy for IEEE 1588.

    Yes on the TMS570, we share the same pins for MII v.s. RMII mode because you use one or the other at a time, never both simultaneously.

    The only correction I would make is that in MII mode,  CRS and DV are separate,  CRS on one pin and DV on another.   The way these signals are mux'd in RMII mode is a little tricky / ingenious and you can read about this in the RMII standard.

    yong zhang2 said:
    Besides, I noticed that you stronly recommend to add some pull up or down resistors to RXD_2 ....and some other signals, why not add them in the TMS570LS3137 HDK directly?

    This has to do with the DP83640 where these pins are used as "STRAP" pins during reset to initialize the phy mode.   The RXD pins initialize the phy address on the management interface, and CRS_DV initializes the meaning of the LEDs.  Please see the datasheet "https://www.ti.com/product/dp83640" and search for "STRAP" in order to find more.

    We missed this when the HDK was designed, and it doesn't cause an issue on the boards that we've built;  but I believe the TMS570 and DP83640 have internall pulls in opposite directions on these pins.   So most of the time they may resolve the same way and there will be no problem on EVMs but those are low volume and if we scrap a few it's not as big a deal as it would be for a system that you might manufacture in high volume.

    You *can* also modify software to turn the MCU pins to output and drive the RESET\ line (pin 29) of the phy as part of your BSP initializaton code; but we thought adding the note recommending the pull resistors would be simpler for most customers.

    Last, regarding Haixiao's comment, this is true that the RMII interface is not supported on the TMS570LS3137 today.    We actually reviewed characterization data from revision C silicon last week however, and it looks like we will be able to support RMII on revision C silicon.  But don't use this forum post as proof -- please wait until you see a datasheet for revision C of the TMS570LS3137 that shows RMII as supported.   I expect to see that come out later this summer.

    -Anthony

  • Thanks very much for your professional answering, and good luck to your futrue work~!

    Regards,

    yong

  • Hello all,

    We also forget to add all "strap" resistors for DP83640. Therefore we try to rewrite setting on DP83640 by SW like this:

    MDIOPhyRegWrite(hdkif->mdio_base, hdkif->phy_addr, PHY_BCR, 0x80000000); // MDIO reset
    sleep(2);
    MDIOPhyRegWrite(hdkif->mdio_base, hdkif->phy_addr, PHY_CDCTRL1, 8);
    sleep(1);
    MDIOPhyRegWrite(hdkif->mdio_base, hdkif->phy_addr, PHY_PCSR, 0);
    MDIOPhyRegWrite(hdkif->mdio_base, hdkif->phy_addr, PHY_RBR, 1);

    It look correct and it works fine. What you mean about solution like this?

    Jiri

  • Jiri,

    My main concern with the Strap is that the PHY address itself is set by straps,  so when you have the code segment above, and you pass the parameter 'phy_addr' to the MDIOPhyRegWrite function, how do you know that the address is actually what got latched into the phy?

    I'm not an expert on the DP83640;  but from what I see in the datasheet while you can set the phy address by writing to PHYCR you can't do this using a broadcast address;  so you'd have to know what the phy address is to begin with in order to change it.

    This is why I would think the simpler way to handle this would be to set the MCU pins as GIO (the pins that drive the strap);   drive them to the correct strap values, and pull/release reset on the phy -- giving it a 2nd reset after the board power on reset.

    That said, I suspect that the code you have probably will work most of the time because it's likely that the pulls on the MCU and the pulls on the phy would resolve themselves the same way most of the time.    So probably on a given board or maybe even most boards, the phy address would always be the same due to straps.  I admit I have not looked into the matter in detail;  i.e. checking the actual voltages of the pullup/pulldown combination during reset;  so I don't know how strong a bias there is in one direction or the other.  But such a scheme isn't reliable per spec;  because we have a fairly wide range of pull up/down currents in our datasheet. 

    You could also post a question to the Ethernet interface forum http://e2e.ti.com/support/interface/ethernet/default.aspx  where someone supporting the DP83640 might have additional ideas.  If you please just add me to the copy.

    Best Regards,

    Anthony