Hi,
I have a RM48 950 on the HDK.
I have connected the EMIF to 16-bit SRAM(follow figure17-8) and I do a basic EMIF configure, when I do a basic EMIF write from RM48 to SRAM.
I am writing the data 0x60000000 to the CS2 address space. Why start address at 0x0000E0? and Repeat at 0x0000FE?
Why not start address at 0x000000?
Could anyone begin to guess what the problem is?. Is this a software setup issue?
I have simply configured the CE2CFG register, its code is as follows:
void emif_ASYNC1Init(void)
{
/* USER CODE BEGIN (2) */
/* USER CODE END */
emifREG->CE2CFG = 0x00000000U;
emifREG->CE2CFG = (0U << 31U)|
(0U << 30U)|
(0U << 26U)|
(0U << 20U)|
(0U << 17U)|
(1U << 13U)|
(1U << 7U)|
(0U << 4U)|
(0U << 2U)|
(emif_16_bit_port) ;
emifREG->AWCC = (emifREG->AWCC)|
(emif_pin_high << 29U)|
(emif_pin_low << 28U)|
(emif_wait_pin0 << 16U)|
(0U);
emifREG->PMCR = (emifREG->PMCR)|
(0U << 2U)|
(emif_4_words << 1U)|
(0U);
/* USER CODE BEGIN (3) */
/* USER CODE END */
}
This is my test code as follows:
void main(void)
{
/* USER CODE BEGIN (3) */
int i=0,waddr=0x60000000,raddr=0x60000000;
emif_ASYNC1Init();
for (i=0;i<100;i++) {
*((uint16_t *) waddr) = k++;
waddr = waddr + 16;
}
for (i=0;i<10;i++) {}
for (i=0;i<5;i++) {
Unt16Temp = *((uint16_t *) raddr);
raddr = raddr + 16;
}
while (1);
}
PS:I have do MPU initial and enable in sys_startup.c
void _c_int00(void)
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
/* Initialize Core Registers to avoid CCM Error */
_coreInitRegisters_();
/* USER CODE BEGIN (6) */
/* USER CODE END */
/* Initialize Stack Pointers */
_coreInitStackPointer_();
/* USER CODE BEGIN (7) */
_mpuInit_();
_mpuEnable_();
/* USER CODE END */
/* Work Around for Errata DEVICE#140: ( Only on Rev A silicon)
*
* Errata Description:
* The Core Compare Module(CCM-R4) may cause nERROR to be asserted after a cold power-on
* Workaround:
* Clear ESM Group2 Channel 2 error in ESMSR2 and Compare error in CCMSR register */
if (DEVICE_ID_REV == 0x802AAD05U)
{
_esmCcmErrorsClear_();
}
Any help please?
Thanks
Sam.
