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Hi,
I'm still working on evalboard EKS LM4F232 with CodeComposer Studio v5.
The SPI module #1 which is located on the alternate function of port F0..3 is not usable because pin 0 is fixed locked to the NMI function and the alternate function would be the MISO line (SSI1Rx). The lock is protected by an unlock and commit register but in my case it was impossible to unlock it. If I cannot switch to the alternate function the whole SSI1 is not usable because the serial input is missing.
The following instructions according datasheet would normally unlock the NMI function on pin F0:
(*(( volatile uint32_t *)0x40025520)) &= 0xfe; // GPIOLOCK - unlock pin 0
(*(( volatile uint32_t *)0x40025524)) |= 1; // GPIOCR - commit pin 0
But both bits are not changeable and therefore the AFSEL, DEN and PUR can also not be changed.
How can I get SSI1 working?
Hi,
Try this code:
//
// Unlock PF0 so we can change it to a GPIO input
// Once we have enabled (unlocked) the commit register then re-lock it
// to prevent further changes. PF0 is muxed with NMI thus a special case.
//
HWREG(BUTTONS_GPIO_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(BUTTONS_GPIO_BASE + GPIO_O_CR) |= 0x01;
HWREG(BUTTONS_GPIO_BASE + GPIO_O_LOCK) = 0;
and #include inc/hw_gpio.h - you missed the GPIO_LOCK_KEY ( 0x4C4F434B) define.
Petrei
Hi Juergen,
You need to perform the unlocking procedure to configure PF0 as SSI1RX. See related posts below for reference.
http://e2e.ti.com/support/microcontrollers/stellaris_arm/f/471/p/63836/945143.aspx#945143
http://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/p/270504/945263.aspx#945263
-kel
Thanks Petrei,
that was it!
Register 0x40025520:0 does not unlock bit 0 as I thought, it unlocks the commit register. And it is written in description of register GPIOLOCK.
The problem is that this valued information stands at a point where a hundred times before is written:
"Software should not rely on the value of a reserved bit. To provide compatibility ..."
So nobody reads this.
Thanks for your help. Code is already changed and works.