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Cortex-R4 and DBGEN signal

Hello,

I have question about DBGEN signal on Herkules Cortex-R core. ARM documentation describe that it is an external signal (external for ARM core not for chip) and it is possible read through register DBGAUTHSTATUS (on TMS570 address 0xffa01fb0 is always 0x000000f0 -> both DBGEN and | NIDEN signals =1)

When I read SPNU499A (tms570 reference manual) I can see that another similar DBGEN signal for peripherals (DMA, but not core)  are triggered by nTRST.

Therefore I am surprised, that DBGEN signal on core is always =1 independent to nTRST.

Question: is it possible block Cortex-R core DBGEN signal by hardware?  I expect yes, because TMS570 is mainly for secure applications, but I am not abble find how.

Many thanks, Jiri

  • Hello Jiri,

    I have forwarded your post to one of our experts.  They will respond back soon.

  • Jiri,

    (1) How do you read DBGAUTHSTATUS register? Do you have a code to read it in run time or you just look at it from debug memory window? If you look at it in the debug memory window, CPU is in debug mode.

    (2) For DMA and some peripherals, the user has the option to keep it running when CPU is halted or stop the DMA/peripheral operation once CPU is halted.

    Thanks and regards,

    Zhaohong

  • Hello Jiri,

    Your observation is correct: the DBGEN signal on the Cortex-R4F CPU is tied to '1' to enable invasive debug. It is not possible to change the state of this signal.

    The DBGEN signal in the DMA controller is used when you want to enable a watch-point on DMA accesses.

    TMS570 microcontrollers are specifically designed for safety applications. These also include an Advanced JTAG Security Module (AJSM) that allows you to prevent JTAG access.

    Regards,

    Sunil

  • I read this register with disconnected JTAG by SW.

    But now it is obsolete. Question have perfect answer.