Hallo,
I refer to TM4C1231H6PGE and its datasheet.
The description of SSI Interrupt Mask (SSIIM) (pag. 954) is a little bit confusing.
it is stated:
"Setting a bit sets the mask, preventing the interrupt from being signaled to the interrupt controller. Clearing a bit clears the corresponding mask, enabling the interrupt to be sent to the interrupt controller."
but the description of single bits is:
SSI Transmit FIFO Interrupt Mask Value Description:
0 The transmit FIFO interrupt is masked. (I understand that the interrupt is not signaled to the interrupt controller)
1 The transmit FIFO interrupt is not masked.
them seem to be two contradictory descriptions.
If I read source code of TivaWare_C_Series-1.0/driverlib/ssi.c I can find the function:
void
SSIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
{
//
// Check the arguments.
//
ASSERT(SSIBaseValid(ui32Base));
//
// Enable the specified interrupts.
//
HWREG(ui32Base + SSI_O_IM) |= ui32IntFlags;
}
I understand that to enable interrupt bits are set, is that right?
in short, the SSIM register's bits are to set or cleared to meke the relative interrupt enabled?
best regards
