Watchdog reset during Flash_Start_Async_Command_B

Hi Kevin,

i forwarded your question to our flash API expert.  He will get back to you soon.

Hello Kevin,

The first thing I would look at is if there is any code trying to execute from Flash while the erase operation occurs.  This would cause the core to stall until the Flash operation completes which could exceed the time of the watchdog and kick it off.  As I typically do not use interrupts, I will need to get some information from some colleagues on them.

To redefine Feed_Watchdog_V(), you would need to write your own version of the function and have the linker include it instead of the one included in the Flash library..

Kevin,

To clarify, are you sure an interrupt is causing the reset problem, or did you just want to rule it out based on the other forum post?

You might try disabling interrupts right in the CPU.  If you disable in the VIM there might be some interrupt requests in flight that have already hit the CPU but not been serviced, and might be that you're getting one of these..  

On the M3 apparently the interrupt disable is done by writing to the PRIMASK bit instead of CPSR like the other ARM processors. 

Best Regards,

Anthony

I was trying to disable interrupts based on the other forum post.  I have an interrupt that occurs every ms, so if it is occuring during the flash erase, it could be causing some of the problems.  Would there be another problem that could cause the flash erase to take too long?

I'll try disabling the interrupts in the CPU and see if that helps with the problem.

Thanks

Kevin,

I haven't used the Flash API myself, and am not aware of integration issues.   John is the right guy to answer that.

But, it is good to know if the interrupt is 'confirmed' to be the problem or if it's just a likely source and we should be open to other potential problems.

I think the first step is still to try the CPU level interrupt disable though as it's got some likelihood of resolving the issue.

Best Regards, 

-Anthony

Anthony: I looked through our documentation and I'm still not really sure how I would disable the interrupts at the CPU level.  Do you have any information on how to do that?

John: We are using the digital watchdog timer for the board.  Does Feed_Watchdog_V() reset the DWD or do we need to redefine it to reset the DWD?  The documentation says the erase should nominally take 1.5 seconds, so I'm assuming either the DWD doesn't get reset properly or there is another call from the Flash somewhere. 

Thanks

Kevin,

Feed_Watchdog_V() is resetting the DWD.  What does your code do after issuing the erase command?

Are you in a loop waiting for the Flash Status to no longer be busy?

John,

Our call to write to the flash is:

TI_FEE_WriteSync(blockIndex, (uint8_t*)data);

do {

TI_FeeManager();

}while (TI_FEE_getStatus() != IDLE);

The DWD resets while in TI_FeeManager().  While in debug mode, I am able to step it until the call Flash_Start_Async_Command_B around line 266 where it tries to erase one flash sector:

u32VirtualSectorStartAddress=Device_FlashDevice.Device_BankInfo[u16Bank].Device_SectorInfo[TI_FeeGlobalVariables.Fee_u32InternalVirtualSectorEnd].Device_SectorStartAddress;

if((Flash_Start_Async_Command_B((UINT32 *)u32VirtualSectorStartAddress,CMND_ERS_SECT,0x00000000,Device_FlashDevice.Device_BankInfo[u16Bank].Device_ControlRegister))==TRUE)

{

}

When I try to step past the flash function, the watchdog resets.

Kevin,

Would you paste your map file here for me to look?

Kevin,

There is a CPS instruction that can enable and disable interrupts in the processor.

You can try the compiler intrinsic _disable_IRQ() although I'm not sure if it applies to Cortex M.

However if this doesn't generate a CPS instruction, you might have to insert the CPS yourself inside an asm("") statement.

-Anthony

John,

I am unable to post the map file to the forum. I can either email the file to you or if there is a certain part of the file you want to look at, I can try to look at it and tell you what is there.