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Address Parity Override doesn't generate DATA Abort but on ESM Group 2 Error for ATCM

Pashan None
Genius 5660 points
Other Parts Discussed in Thread: TMS570LS0432

Hello Support,

While performing self-test of Address Parity Error for ESM Group 2 Channel 4 related to ATCM using
FLASH.FPAR_OVR_REG.word = 0x00005B00U;
I do get ESM Group 2 Error correctly.

My Cortex-R4 core ECC are enabled.
Because for TMS570LS0432, ECC contains also ADDRESS as part of ECC calculation, so I was assuming I should get ESM Group 3 Error as well as DATA ABORT from Cortex.

I don't see ESM Group 3 Error or DATA ABORT.
Any clue where might be my mistake?

Thank you.
Regards
Pashan

  • 0
    TI__Expert 4225 points

    Pashan,

    The cortex R4 sends address/control + parity bit on ATCM bus.

    The parity is evaluated by the flash controller based on incoming address/control and incoming parity bit.

    The parity test is used to check the parity evaluation circuit e.g. flipping the parity polarity.

    It does not alter the address from CPU that is used to generate the address component in ECC syndrome.

    Thus, parity testing should not affect ECC and should not generate CPU abort.