Other Parts Discussed in Thread: HALCOGEN
Hi
How to use HET Interrupts by using CCS 5.4 and Halcogen?
How to configure Halcogen? Where i may see a example?
Regards, Roman
How to configure HET[x] pin?
I setting HET port pins to input, and set bit to high level, but physically on MCU pin low level...
My Halcogen settings:
Roman,
I'm attaching a project as an example. It's not a perfect example. I didn't track down yet which interrupt level is being used for starters. We've unfortunately got different numbering schemes for 'level' (0 and 1, 1 and 2, and 'hi and lo') in our docs so for now I enabled both levels.
Also, I don't have a convenient way to generate edges so I used the PWM interrupt instead. But you should be able to adapt this to your edge example. (and probably a good exercise to try it).
I was surprised to find that even though in the HalCoGen GUI you can select an interrupt based on a PWM or Capture, the template that adjusts the HET code to the HalCoGen GUI settings doesn't have the capability to change the HET instruction to generate the interrupt. So I added this manually.
Here is what I put in the main() function:
You can load this program and put a breakpoint on the hetRAM->Instruction... line like I have in the picture above.
It is after a very long delay and you should be able to see PWMs on pin het[8] during this time, but no interrupts.
To see Interrupts, put a breakpoint here in the file notification.c : this is the call-back function where you will eventually add your interrupt handler code.
Also you might want to put a breakpoint here in the file het.c
What I see is the following:
1) no hits on the interrupt before the line 40 of sys_main.c is executed. first break is on line 40.
If you pause and watch the HET memory or HET registers you can see that the HET is running and
in the HET GIO registers you can see that the pin is toggling (look at DIN change).
2) run again after hitting the BP at line 40. Now you will get breaks at the interrupt handler.
The job that line 40 is doing is to change the 'Int enab' bit of the instruction's control ram field, so that an interrupt is requested by the HET instruction when the duty cycle is met. The HET instructions have to generate the interrupt request themselves....
Normally if you write your own HET program and run it through the HET IDE you'd have this coded into the program from the start. Not sure the concept behind this canned example. I'll check what the thought process is.
Last, you can see that the +41u is added to the index of the pwm0 instruction. This is a MOV64 instruction that *updates* the PWCNT instruction.
If we were writing this code from scratch we'd probably have the interrupt enable set in both the original instruction at het instruction 0x2 *and* it's refresh instruction the MOV64 at the higher address configured for interrupt enable.
I'm taking a bit of a shortcut here by only enabling the interrupt in the refresh instruction; but to illustrate the point that this bit setting is one of the missing pieces to see interrupts from HET with the HalCoGen example.
Don't worry yet if this seems obtuse... it is... so give it a shot and it'll become clearer.
Last thing: I included the .hcg project file so you can open it and inspect the screens like your question above. Please also look at the screens for the VIM, as interrupts need to be enabled in the VIM as well as in the HET.
