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EMIF data bus width



Hello,

I am using the RM48x microcontroller and I have a question regarding the EMIF module. It states that: "This EMIF memory controller is compliant with the JESD21-C SDR SDRAM memories utilizing a 16-bit
data bus".

In my case I am planning on using a 64Mb SDRAM, which according to this should be a 1024k x 16 x 4, that has either pc100 or pc133 functionality, in order to function properly. The thing is that I have a 512k x 32 x 4 memory with pc100 functionality.

Is there a problem if I use this memory? If there are problems with this memory, what are the problems that I'll be facing? How would it read/write a 32 bit variable from/to the memory?

Thanks for your help and sorry for such a question, it's been a long time since I've dealt with these problems.

  • Pablo,

    You will only be able to access 1/2 of the memory if you chose to use a x32 memory on a x16 bit bus.  And you will need to make sure to program the EMIF memory controller like you would if the memory were x16 bits wide.    Regarding your question about writes of 32-bit variables to memory;  these will be split into 2 cycles of the 4 cycle burst.  So it will be like you have a x16 bit memory attached.

    Is this a problem? - depends on your care abouts I suppose.