VDDC LDO capacitors

The 1u part has roughly similar typical minimum ESR.  Since three of those are used the ESR of the capacitance on the evaluation board is quite a bit lower than the stated minimum requirement.

I am wondering though if the missing information is the frequency range the minimum ESR is required for.  That could make quite a difference if the minimum ESR was not needed over a broad spectrum.

Robert

Any thoughts?

Robert

Hi Robert,

Where are you getting the 8 mOhm specification?

Looking up the 0.1uF cap used on the board, the GRM188R71H104KA93D from Murata, the ESR is about 15 mOhm at 10 MHz.

-David

Looks like you are right.  Unfortunately I cannot read the data sheet and only have a small low resulution bitmap to look at (the data sheet comes up blank wanting additional fonts which will not download, bad design on Murata's part). More importantly these are paralleled so once you have two of them you are down under 8mOhm and that appears to be typical ESR rather than minimum.

Add in the 3 1u parts and you are well below the specified minimum ESR.  The 1u parts appear to have a min of under 5mOhms typical (http://graph.tdk.co.jp/ccv/graph/graph.asp?plist=A000407793&graph=20002&x_mode=1&y_mode=1&x_min=0%2E1&x_max=10000&y_min=0%2E0001&y_max=10000&x_unit=008&y_unit=006&imp1=50&imp2=50&imp3=&imp4=&mode=2&dlf=1) near 2.5MHz

I have no idea if that link will survive.

Robert

Robert

Hi Robert,

I have an email out to one of the designers. Please bear with me.

I apologize if this is causing a delay in your project.

-David

Thanks David,

We are proceeding witht he rest of the board and still have a little time to make corrections.

Robert

Any progress David?

Robert

Hi Robert,

Thank you for your patience. I'm sorry this is taking so long.

My design contact was out of town for a bit. Now that he's back in town I am working with him to fully understand our ESR requirements.

I will get you a response as soon as possible.

-David

Are we any further along?

Robert

Any progress?

Robert

Hi Robert,

The minimum ESR rating value is a result of simulations done by our design team. Our chips have gone through extensive silicon level testing using boards with the exact same LDO capacitors and a very similar layouts and we are confident in the design that the evaluation board demonstrates.

I am still working with design to run additional simulations and tests to see if we can adjust or eliminate the minimum ESR rating to better match what we have found in practice. This is why it is taking so long to get a concrete answer.

I truly apologize for how long this is taking.

-David

Thanks David,

Just making sure it's still being investigated. 

I want to be sure our layout will work over temperature and process variations not just the example we have in front of us.

Robert

I figured it was time to follow up again and see if there was any further progress.

Robert

Hi Robert,

I will have a final verdict on the ESR minimum early next week. One of the designers is finishing up some simulations this week so afterwards we should be able to put this to rest, finally.

I really appreciate your patience,

David

Thanks David, I'll keep following up until we get something definitive.

Robert

Thank you David, that is good news.

Much appreciated

Robert