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Profile code (in cycles) on Cortex M4 (Stellaris Launchpad) using IAR Embedded Workbench

Eakta Jain
Prodigy 160 points

Hi,

I need to benchmark some code on the Cortex M4 EVM in terms of number of cycles. I find that if I run the code on the IAR Simulator, the register CYCLECOUNTER can be used to count the number of cycles it took.

However, if I change the target to TI Stellaris, i.e. run the code on the EVM, the CYCLECOUNTER register is no longer available in the Register tab!

How can I profile or benchmark code in this case? (via software) I do not have a J-link/JTrace, only the USB ICDI connection to the PC.

Thanks,

Eakta

  • 0
    Guru 26105 points

    Hi,

    In this thread is a small routine to do such thing - accurate cycle timing measurement of a program/routine. Process as needed - enjoy!.

    Petrei

  • 0 in reply to Petrei
    TI__Prodigy 160 points

    Thanks for pointing to that thread. I don't really understand how the code snippet works. Could I request you to post a small explanation? Or point me towards how I can learn about it?

    Thanks.

  • 0 in reply to Petrei
    Guru 117855 points

    As usual - poster Petrei does great job.

    If not already in your tech library - Joseph Liu's, "Definitive Guide to the ARM Cortex M3" proves most worthwhile...

    And - someone nearby must have/have access to JLink.  So much easier to just "read" Cycle Counter w/in IAR...

    Note: above shows the "burden" caused by, "SysCtlClockSet()."  That was 1st function call post Reset - CycleCounters (all shown) reported 895 prior to executing that SysCtl.  "CCStep" shows the impact of SysCtlClockSet() when employing PLL & Main Osc...  (this function shows some slight variation - run to run - thus the 1 cycle deviation appearing below...)

    In contrast, "ROM_SysCtlPeripheralEnable()" executed in just 32 cycles...  CCStep saves so much time/effort...

    BTW - "Cycle Counter" reveals both w/in "CPU Registers" (shown here) and "Current CPU Registers."  Have you tried both? 

  • 0 in reply to cb1_mobile
    Guru 26105 points

    Hi,

    @cb1- : Thanks.

    @Eakta: cb1 is right - this is from Yiu - nothing special, those registers are part of Cortex-Mx processor - only to be used. The definitions of two of them are already included in inc/hw_nvic.h file; the third one - DWT_O_CYCCNT- is not (but it would be nice to be in a future release of TivaWare) so I decided to define it locally. For the rest - the comments are already written. If you like more info, either ARM manuals, either Yiu book.

    Regards,

    Petrei