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TIVA C ADC sampling time considerations

Prad1
Genius 3825 points

Hi,

We would like to know the details about TIVA C's ADC sampling time and conversion time.

1.
The datasheet mentions ADC sample time= 250ns and ADC conversion time = 1us(includes the ADC sample time (Ts))
from the above values can we assume that ADC's conversion time = 750ns?
do we have any equation to calculate the ADC Sample Timing and conversion time?

2.
Is it possible to change the sample-and-hold time in TIVA C ADC similar to other MCU's like MSP430
where there is an option for sample-and-hold time as 4xADCCLK cycles、16xADCCLK cycles....etc.

3.
In our customer's application there is a necessity to Turn OFF the signal source to the ADC input,
so they want to know what could be the minimum sampling time required for the ADC's sampling capacitor to
hold the sufficient charge.


Best Regards.
prad

  • 0
    Genius 3825 points

    Please let me know if there is any comments on this topic.

    We would like to know if it is possible to sample different channels with different
    configured sampling times.

  • 0
    Guru 117855 points

    Surely considered, official comment - best.

    While that percolates - should time be of essence - would not controlled experiment glean improved understanding?  And - may point to other/further issues - which you may then append.

    And - we find that "real-world" measurements - keyed to your exact HW/signals/timings - often proves most effective...

  • 0 in reply to cb1_mobile
    Genius 3825 points

    Yes you are right but, these timings seems to be important to our customer in order to
    choose this MCU before starting the evaluation. It would be helpful if we had such details.

  • 0 in reply to Prad1
    Guru 117855 points

    Prad1 said:
    seems to be important to our customer

    If "important to your customer" - believe course suggested superior to, "idle waiting..." (i.e. shows superior effort/concern - your part)