This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48HDK sci loopback problem

Other Parts Discussed in Thread: HALCOGEN

Hi,

I'm using RM48HDK rev-d board.

I encountered weird behavior with sci loopback using interrup for receive path. For transmit I'm using sciSend generated by halcogen and transmitting 1 byte. Receive interrupt don't occur. With send buffer grater then 1 receive interrupt's ocure but last byte is never received.

If using polling method for receive everything is received correctly.

Is there anything that I have ignored?

 Thanks

  • Luděk

    We need more information to help you debug this.

    I would normally start by checking the SCI configuration registers to make sure they make sense.
    For example, is the SCI RX interrupt even enabled (bit 9 of SCISETINT)? Do you have bits 17 and 18 set in the same registers (these need to be 0)?

    What level is the interrupt set to (High or low level - what does SCISETINTLVL say?)

    What bit are you using in polled mode?  Is it the SCIRXDRY bit in the SCIFLR register? 

    After checking the SCI and how it's configured for interrupts, the next thing to check would be the VIM.
    How is the VIM configured?  Is the VIM channel that you expect to see the SCI interrupt in showing an interrupt pending in the INTREQ[] registers?

    Some pictures in the VIM chapter of the TRM might help too. 
    The big picture at the device level you can find on figure 15-1 "Device Level Interrupt Block Diagram".   Then inside the VIM, the path is illustrated in Figure 15-2 and most every step has registers that can be read for status.

     

  • Hello

    1. in SCISETINT I have set only bit 9. All remaining is 0

    2. in SCISETINTLVL I have also bit 9 set to 1 and remaining to 0. In HALCogen is path rendered throw high level on rx. 

    3. in polling mode I´am using HALCoGen generated function which uses "while ((sci->FLR & SCI_RX_INT) == 0U)". also bit 9

    4. in vim INTREQ[] all bit is 0

    but if I turn off Loopback function and send from PC 1 byte then rx interrupt occur. That implies vim configuration OK, or I miss something?

    Luděk

  • Luděk,

    I almost was about to reply impossible ;)  But then remembered there is something in the TRM that says that TXEMPTY and RXRDY are irregular compared to the rest of the interrupt status flags.  It looks like interrupt request is decoupled from TXEMTPY and both TXEMPTY and RXRDY are not cleared by reading the INTVECT[] vector register like the other interrupt flags are set.   What I can't tell from the TRM is whether RXRDY can be set but no interrupt generated.  I'll need to dig into this.

    Meanwhile - it would be good to confirm whether you've turned on either the LIN mode or the Multibuffer mode. --  What value do you have in GCR1?

    If you did happen to enable the multibuffer mode, what's in your SCIFORMAT register?

    Might be good to past all the SCI control reg. values in case the above leads to more questions.

     

  • Hi,

    I finally get it working but I don´t understand why is working.

    This is my code:

    void sciNotification(sciBASE_t *sci, uint32 flags)
    {
    /* enter user code between the USER CODE BEGIN and USER CODE END. */
    /* USER CODE BEGIN (29) */
    gioPORTB->DCLR = 1U;
    /* USER CODE END */
    }

    int UartSelfTest(void)
    uint8 txBuffer[TX_SELFTEST_BUFFER_LEN] = {TX_SELFTEST_CHAR,};
    uint8 rxBuffer[TX_SELFTEST_BUFFER_LEN] = {0U,};
    uint16 p = 0U;

    /* enable digital loopback */
    sciEnableLoopback(scilinREG, Analog_Lbk);

    /* start receive */
    sciReceive(scilinREG, TX_SELFTEST_BUFFER_LEN, rxBuffer);
    /* wait [0] */
    gioPORTB->DSET = 1U;
    p = 600U;
    while(p)
    {
    p--;
    }
    gioPORTB->DCLR = 1U;
    /* transmit test string */
    /* blocking send */
    sciSend(scilinREG, TX_SELFTEST_BUFFER_LEN, txBuffer);

    gioPORTB->DSET = 1U;

    /*wait for receive compl completion*/

    /* disable digital loopback */
    // sciDisableLoopback(scilinREG);
    return 0
    }

    Before wait [0] registry for sci and vim is in file 3872.LoopbackInitialize.txt

    If I remove wait[0] receive interrupt never ocur. I looks like enabling loopback neads some time to connect Tx to Rx

  • Great detective work.  That would make sense, depending on how the detection of the START bit is implemented.  If this is the case too, I'd expect that if you had a pullup on the SCI RX pin, it might work without the wait[] as well.

  • Hi,

    I tried with SCI RX pin with pullip but same result.

    Best Regards,

    Luděk Hezina