This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

HALCoGen 3.06.00 change for TMS570LS3137 global variable initialization

Other Parts Discussed in Thread: HALCOGEN

Hello,

Up through HALCoGen v3.05.02, the copy table, variable, and constructor initialization was done explicitly in sys_startup.c.  V3.06.00 has replaced that code with a call to TI_auto_init(), which is part of CCSv5.

1) Is there a dependency on the CCS version?  We are using CCSv5.2 which contains ARM compiler v4.9.5, the latest CCS contains v5.0.4 - a change in the major version.

2) Why the change only for this processor? 

3) What would be the impact of using the old initialization code instead of calling the library?

Thanks, Charlie Johnston

  • Hi Charlie,

    Please find answers to your questions.

    1) Is there a dependency on the CCS version?  We are using CCSv5.2 which contains ARM compiler v4.9.5, the latest CCS contains v5.0.4 - a change in the major version.

    Pra --> NO

    2) Why the change only for this processor? 

    Pra --> Others will also be updated in the upcoming release.

    3) What would be the impact of using the old initialization code instead of calling the library?

    Pra --> It's perfectly fine to use the old initialization code, using library for initialization makes the implementation clean and we want to be alligned across the way other tools initialization methods i.e, using library function.

    Regards
    Prathap

  • (TMS570LC43, CCS55, FreeRtos)

    Hello, I have a problem with TI_auto_init(), it doesn't work.
    I have to use the old fashion code and also, have to change something cause I've got null pointer and I have to manage to skip it (refer to count++ below).
    It runs accross a couple of constructors, about 3 or 4 and then a null pointer at the end of its list. This is stange, a very short list considering my whole application code !

    I know that it runs accross many other constructors. What is the purpose of this initialization loop ? it seems to cover very few things and the majority of contructor are initialized otherwise.

    extern "C" void copy_in( void *binit ); extern "C" void __TI_auto_init( void ); extern "C" void _c_int00(); /**** CODE TEMPORAIRE POUR PATCH GLOBAL_INIT **/ //// Type Definitions typedef void (*handler_fptr)(const unsigned char *in, unsigned char *out); // External flags extern unsigned long * __binit__; extern unsigned long __TI_Handler_Table_Base; extern unsigned long __TI_Handler_Table_Limit; extern unsigned long __TI_CINIT_Base; extern unsigned long __TI_CINIT_Limit; extern unsigned long __TI_INIT_ARRAY_Base; extern unsigned long __TI_INIT_ARRAY_Limit; /**********/ extern short _RamfuncsLoadStart; extern short _RamfuncsLoadEnd; extern short _RamfuncsRunStart; volatile unsigned long countRam = 0; #pragma CODE_STATE(32) void CopyRamFuncs( void ) { short *src = &_RamfuncsLoadStart; short *end = &_RamfuncsLoadEnd; short *dest = &_RamfuncsRunStart; while( src < end ) { *dest = *src; dest++; src++; countRam++; } } #pragma CODE_STATE(32) #pragma INTERRUPT(RESET) void _c_int00() { switch( DrvSys::GetResetSource() ) { case DrvSys::POWERON_RESET: case DrvSys::EXT_RESET: case DrvSys::OSC_FAILURE_RESET: case DrvSys::WATCHDOG_RESET: case DrvSys::CPU0_RESET: case DrvSys::CPU1_RESET: case DrvSys::SW_RESET: default: // Disable cache during initialization CoreDisableCache(); // Enable floating point unit CoreEnableVfp(); // Initialize L2RAM to avoid ECC errors right after power on MemoryInit(); case DrvSys::DEBUG_RESET: case DrvSys::NO_RESET: // When no reset or debug reset, do not reinitialize memory to allow passing values // between programs CoreDisableCache(); // Clear reset source DrvSys::ClearAllResetSource(); // Initialize Core Registers to avoid CCM Error CoreInitRegisters(); // Initialize Stack Pointers CoreInitFiqStackPointer( FIQ_STACK_ADDR ); CoreInitIrqStackPointer( IRQ_STACK_ADDR ); CoreInitAbortStackPointer( ABORT_STACK_ADDR ); CoreInitUndefStackPointer( UNDEF_STACK_ADDR ); CoreInitUserStackPointer( USER_STACK_ADDR ); CoreInitSvcStackPointer( SVC_STACK_ADDR ); // Enable CPU Event Export // This allows the CPU to signal any single-bit or double-bit errors detected // by its ECC logic for accesses to program flash or data RAM. CoreEnableEventBusExport(); // Copy RAM functions to RAM. CopyRamFuncs(); // Initialize System - Clock, Flash settings with Efuse self check DrvSys::Init( DrvSys::OSC_16MHZ_PLL_300MHZ ); // Initialize all peripherals in safe mode DrvInit::SafeInit(); // Enable IRQ offset via VIC controller CoreEnableIrqVicOffset(); // Disable Error signal module and clear errors DrvEsm::Init(); // Initialize VIM table DrvVim::Init(); // initialize global variable and constructors //__TI_auto_init(); /**** CODE TEMPORAIRE POUR PATCH GLOBAL_INIT **/ //// Initialize copy table if( (unsigned *)&__binit__ != (unsigned *)0xFFFFFFFF ) { copy_in( (void *)&__binit__ ); } // Initialize global variables typedef void (*handler_fptr)(const unsigned char *in, unsigned char *out); if( &__TI_Handler_Table_Base < &__TI_Handler_Table_Limit ) { unsigned char **tablePtr = (unsigned char **)&__TI_CINIT_Base; unsigned char **tableLimit = (unsigned char **)&__TI_CINIT_Limit; while( tablePtr < tableLimit ) { unsigned char *loadAdr = *tablePtr++; unsigned char *runAdr = *tablePtr++; unsigned char idx = *loadAdr++; handler_fptr handler = (handler_fptr)(&__TI_Handler_Table_Base)[idx]; (*handler)( (const unsigned char *)loadAdr, runAdr ); } } // Initialize Constructors typedef void (**DFPtr)(void); void (**base)() = (DFPtr)&__TI_INIT_ARRAY_Base; void (**limit)() = (DFPtr)&__TI_INIT_ARRAY_Limit; volatile unsigned long count = 0; while( base < limit ) { void (*p)() = *base++; if(*p != 0) { p(); } else { count++; } } /*****************************/ // Call the application RunMain(); break; } //Exit();