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DMA request from ADC

matteo lucarelli
Genius 3265 points

Other Parts Discussed in Thread: HALCOGEN

To setup a DMA request every 16 samples of  ADC1 I've set:

  • Enable ADC1 driver in Halcogen
  • Setup FIFO size of 32 in ADC1 Group Event
  • Set to 32 the DNDA pointer for ADC1 memory

And, Inside the sys_main.c:

    adcInit();
    adcEnableNotification(adcREG1,adcGROUP0);
    adcREG1->EVDMACR=0x00100005;

It doesn't work. there's something wrong or forgotten?

thank you,

Matteo

  • 0
    TI__Mastermind 22715 points

    Matteo,

    You need to set up the DMA module to take the request from ADC module. Do you have a picture of the functionality you want to achieve?

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Genius 3265 points

    Zhaohong,

    I'm not sure what you mean for "a picture". What I need is to send a DMA request from the ADC every half FIFO.

    What can be done in HalCoGen and wich other code is required?

    Thank you,

    Matteo

  • 0 in reply to matteo lucarelli
    Mastermind 7585 points

    Matteo,

    please also look into this: http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/239783/842263.aspx#842263 In this thread there is answer from Sunil Oak:

    "Please also note that the ADC does not automatically reconfigure the "G1 BLOCKS" field of the Group1 DMA control register, so that the application must rewrite the number of results you need to accumulate before generating the next DMA request. You can consider this as a bug since it does limit the usefulness of the block DMA transfer feature. This will be taken as an enhancement in future updates of this design."

    It means that the DMA can NOT handle the reading  of the ADC-results wihout an interrupt service at the end. Therefore it seems to me that there is no advantage in using the DMA to read samples compared to an ADC-ISR at the and of a group of samles.

    Frank

  • 0 in reply to Frank Bormann
    Genius 3265 points

    So there's no way to implement a larger double buffering (I mean larger then the 32 samples of the ADC) without the intervention of the CPU?

    I'm going to verify if this can cover my performance requirement.

  • 0 in reply to matteo lucarelli
    Mastermind 7585 points

    At the moment it looks like there is not more efficiency in using the DMA for ADC-Sampling, compared to a common CPU interrupt service at the end of a FIFO - buffered sampling.  

  • 0 in reply to Frank Bormann
    TI__Guru 59540 points

    Matteo/Frank,

    I've added Sunil to the cc list for this thread to see if there could possibly be a work around for the issues you describe. Perhaps this is a limitation that was not scoped in the use cases for the ADC design in the Hercules products but I wouldn't necessarily call this a bug given a bug is a defect or unintended behavior and this seems more of a feature that is not supported. Perhaps Sunil can shed some light on topic for us.

  • 0 in reply to Chuck Davenport
    TI__Mastermind 49120 points

    Matteo,

    There is one thing you can try. I do not have a code example for this though.

    The ADC module can generate a DMA request for every conversion result it writes to the ADC RAM. This request can be used by the DMA to move the conversion result from the ADC RAM to the CPU RAM as part of one single frame with a single element. Say you define the DMA transfer block size as 16. Then the DMA Block Transfer Complete (BTC) interrupt will allow the CPU to process 16 conversion results at a time.

    Essentially, this eliminates the use of the ADC RAM to store more than one conversion result. Once you get this to work, you can build on it further to implement even a double-buffer in CPU RAM.

    Regards, Sunil