Hi,
I'm working with a TMS570LS31HDK and starting experimenting with continuous ADC. I know there are better ways but my first try is to transfer data accessing the FIFO directly in the ISR function. That's my setup in HalGoGen:
- Set the VCLK1 Divider to 15 (higher value) and ADC prescale to 31 (again higehr value) to obtain the lower possibile Cycle time (isn't it?)
- ADC1 Group 1 is set for software triggered continuous conversion
- FIFO size of ADC1 Group1 set to 64, 8bit data resolution
- for ADC1 Memory DNDA=0 and BNDB=32 (AFAIK is greater possible space for group 1, can it contain a 64 sample FIFO? Documentation is ambiguous here)
- connected VIM channel 15 for ADC1 group1 ISR
My main function:
sciInit(); // for debug messages
adcInit();
// setup a ADC interrupt every half FIFO
adcREG1->GxINTENA[1] = 0x01; // enable threshold interrupt
adcREG1->GxINTCR[1] = 0x20; // threshold value
// enable overwrite on memory overrun
adcREG1->GxMODECR[1U] = adcREG1->GxMODECR[1U] | 0x10U;
/** - Start Conversion */
adcREG1->GxSEL[1] = 0x00000001U;
_enable_IRQ();
while(1);
And inside the adc1Group1Interrupt function:
// simulate a FIFO access to discharge data
uint8 i;
uint8 val;
for (i=0;i<32;i++){
val = (uint8)( adcREG1->GxBUF[1].BUF0 & 0xFFU);
}
// test overrun flag and output a debug message
if (adcREG1->GxINTFLG[1U]&0x2U == 0x2U){
sciDisplayText("OVR ",sizeof("OVR "));
}else{
sciDisplayText("ISR ",sizeof("ISR "));
}
the result output is to alternate "ISR" with "OVR" so it seems that 50% call of IRS are losting some data.
Am I wrong somewhere or this is an expected behaviour?
how to calculate the final sampling rate given the "Actual Cycle Time"?
how to calculate the maximum sampling rate that can be continuously dischange using a simple interrupt mechanism?
Thank you
