TMS570LS3137 - FBPARERR state after nRST

Charles Johnston

Hello,

I'm looking for a RAM location on the MCU that I can use to store an "External WDT Test in Progress" flag. I plan on adding code to sys_startup.c in User Code block 23 that will detect when our external WDT has tripped and caused a warm reset. Part of that code will be a test to set a flag and force a WDT trip.

My question is about the register FBPARERR. The TRM says this register will never be reset by a power-on reset nor any other reset source. It also indicates the value after reset is Indeterminate. Does Indeterminate in this case mean the value is unchanged and survives a warm reset?

Thanks, Charlie Johnston

over 12 years ago

0 KARTHIKEYAN RAJAMANICKAM over 11 years ago

TI__Genius 11645 points

Hello Charles,

Are you trying to use FBPARERR register as a scratch pad to store a value which will survive a Warm reset for comparison post reset to identify/analyze the cause of reset ?

0 Charles Johnston over 11 years ago in reply to KARTHIKEYAN RAJAMANICKAM

Expert 2690 points

Hi Karthik,

Exactly. I want to store a value that indicates an external watchdog test is in progress, then force a watchdog trip. The external watchdog is connected to nRST.

Thanks, Charlie

0 KARTHIKEYAN RAJAMANICKAM over 11 years ago in reply to Charles Johnston

TI__Genius 11645 points

Hi Charlie,

On issuing an nRST your system RAM contents should still be retained. But post reset in your code you should make sure you do not initialize the ram using ram auto init before you go and evaluate the cause for this reset.

0 Charles Johnston over 11 years ago in reply to KARTHIKEYAN RAJAMANICKAM

Expert 2690 points

Hi Karthik,

"RAM contents should still be retained." - I'm looking for something more more definite, which is why I thought the FBPARERR register looked promising. Assuming constant power through the warm reset, under what circumstances would the contents of the uninitialized RAM be questionable?

Thanks, Charlie

0 Charles Johnston over 11 years ago in reply to Charles Johnston

Expert 2690 points

Hi Kartik,

Any progress on an answer to this last question?

Thanks, Charlie

0 KARTHIKEYAN RAJAMANICKAM over 11 years ago in reply to Charles Johnston

TI__Genius 11645 points

Hi Charles,

Its for sure that on an nRST, RAM contents should not get modified but retain its value.

But you can also use Flash Bank 7 starting at offset 0xF0200000h which is dedicated for data storage's such as EEPROM Emulation, which required the Flash API's to be included if in case you already do not have it.

Hope this clarifies your question.

0 Sunil Oak over 11 years ago in reply to KARTHIKEYAN RAJAMANICKAM

TI__Mastermind 49120 points

Hi Charles,

It is recommended to not rely on the RAM contents through a system reset. There are several causes of reset, many of which are asynchronous to the CPU operation. If a reset occurs while the CPU (or any other bus master) is writing to the RAM, the actual RAM contents for that particular 64-bit location cannot be guaranteed to be correct.

Regards, Sunil

0 Charles Johnston over 11 years ago in reply to Sunil Oak

Expert 2690 points

Sunil,

What do you think about using the FBPARERR register? We can't use the Flash API since our regulating body requires source code which would invalidate the datasheet specs for the flash. Plus, that's a lot of code to save one word through reset.

Thanks, Charlie

0 Sunil Oak over 11 years ago in reply to Charles Johnston

TI__Mastermind 49120 points

Charlie,

Please note that the contents of the FBPARERR register are retained through a reset and not a true power cycle.

Also, this register has a dedicated purpose. That is, to hold the fallback address for the interrupt vector that will be used in case of a parity error detected in the interrupt manager memory (VIM RAM). If you put an "arbitrary" value in this register you could have the CPU execute from this address in case of a VIM RAM parity error leading to an abort or other exceptions (depending on the value).

Regards, Sunil

0 Charles Johnston over 11 years ago in reply to Sunil Oak

Expert 2690 points

Hi Sunil,

I plan to use the FBPARERR register temporarily after a power-on reset, then load the true fallback address before VIM parity is enabled.

Thanks to you and Karthik for your time.

Charlie

Arm-based microcontrollers

Arm-based microcontrollers forum

TMS570LS3137 - FBPARERR state after nRST