I think there is a bug in the halcogen V3.06.
The address for canREG3 defined in reg_can.h is wrong. The address of canREG3 should be 0xFFF7DF00U and not 0xFFF7E000U.
I use the RM48L952.
Can you please check and verify this?
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Hi Sunil,
Thank you for the answer. As I can see,the address of canREG3 in reg_can.h is the same. But I can't use the pins of the CAN3 as GIOs. If I set the address to 0xFFF7DF00U it works fine. To me, it seems to be logical if the can1 address is ...DC00 and the can2 address ..DE00 -> the can3 address should be ..DF00?!
Hi Lukas,
Sorry about that.
"To me, it seems to be logical if the can1 address is ...DC00 and the can2 address ..DE00 -> the can3 address should be ..DF00?"
Each DCAN register frame is 512 bytes, that is 0x200 bytes.
DCAN1 base address = 0xDC00
DCAN2 base address = 0xDC00 + 0x200 = 0xDE00
DCAN3 base address = 0xDE00 + 0x200 = 0xE000
I will upload a test code for being able to drive the DCAN3 terminals as general-purpose I/O later today.
Regards, Sunil
Lukas,
I see that the code HALCoGen generates for driving the DCAN3 port as general-purpose I/O has an issue. Essentially the canIoSetPort() function overwrites the bit in the TIOC and RIOC control registers that configure the TX and RX pins as general-purpose I/O.
You can just use simple writes to canREG3->TIOC and canREG3->RIOC to toggle the TX and RX pins respectively.
Let me know if this works for you.
Regards, Sunil
Hi Sunil,
Today I spent some time for analyzing the problem with the can3. I found out the following:
1. You were right with the can3 address. The right address is 0xFFF7E000U.
2. writing to canREGx->TIOC and canREGx->RIOC worked for canREG1 and canREG2. So I could toggle the pins. But writing to canREG3 ->TIOC and canREG3 ->RIOC had no effect, despite the same configuration for can1, can2 and can3
3. So I had a look on the canInit. I saw, that for all three CANs the initialization mode (setting bit 0 of CTL) was set before configuring the can. While for can1 and can2 this bit wasn't reset to 0, for can3 it was reset to 0. See this section in canInit:
/** - Leave configuration and initialization mode */
canREG3->CTL &= ~(0x00000041U);
When I comment this line out, I can use the can3 Rx and Tx pins as GPIOs. I found out, clearing the bit 0 of CTL after the configuration makes the Can Rx and Tx pins as GPIOs unusuable.
Please have a look at this and thank you for the support.
Hi Lukas,
Yes, I agree that the canInit() function generated by HALCOGen has a lot more code than necessary. Once you indicate that the pins are to be used as GPIO, there is no need to "touch" the default settings for any registers other than the TIOC and RIOC registers.
I will let the team know about this. I am glad you have your application working, and thanks for your patience.
Regards, Sunil
Lukas,
For using a CAN port for general-purpose I/O, you don't even need to execute the canInit() routine. You can choose to not generate CAN3 driver from HALCoGen.
The functions for setting the direction and the output level generated by HALCoGen are being corrected in the next update. Until then, use direct writes to the TIOC and RIOC registers.
Regards, Sunil