Hi.
I have three questions regarding the TMS570LS31x devices, module N2HET. I want to update the "Next program address" bit field of the Program Field of a BR instruction, in case the N2HET is turned on, i.e. HETGCR.TO = 1. (Just as a note: I think the question is the same for all N2HET instructions.)
In the E2E discussion "Stop CNT count on NHET" (http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/240786/845681.aspx) is stated several times, that the Program field of N2HET instructions should not be updated by a CPU write access in case the N2HET is ON (i.e. HETGCR.TO = 1).
In this E2E discussion "Stop CNT count on NHET" has Anthony posted (Posted by Anthony F. Seely on Jan 28 2013 10:02 AM) the following: "You can safely update the NEXT field of an instruction through the new 'REMP' destination that is available on the ADD, SUB, etc.. instruction. ". But I don't understand how this should work. Reason: If I read in spnu499b.pdf, chapter "20.5.3.4 ADC, ADD, AND, OR, SBB, SUB, XOR" the following pages, it seems to me, that it's only possible to update the least significant 9 bits of the Program Field:
*) Page 840, 2nd paragraph
*) Page 841, Table 20-54, line for REMP
*) Page 844, below the comment "WRITE REMOTE DESTINATION STAGE"
But the bit field "Next program address" is not part of the least significant 9 bits.
So the three questions are:
1. Is it possible to update the bit field "Next program address" with the ADC, ADD, AND, etc. instructions? If yes: Can you state a short example how this is possible?
2. If the answer of question 1 is no: IMHO the only possibility, to update the bit field "Next program address", would be with the following sequence:
a. Turn the N2HET off (i.e. set HETGCR.TO = 0).
b. Update the bit field "Next program address".
c. Turn the N2HET on (i.e. set HETGCR.TO = 1).
3. Is there an other possibility to update the bit field "Next program address" in case the N2HET is turned on?
Regards,
Oliver.