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TMS570 nhet edge interrupt

mate szebenyei
Prodigy 80 points

Other Parts Discussed in Thread: HALCOGEN

Hello,

 

I am new to NHEt and I try to create a  simple edge detection on pin0-pin4.

First I am try to do this only on one pin. I used the HET IDEs example algorithm

; Input Time Stamp using WCAP ; Possible events ={NOCOND | FALL | RISE | BOTH}

L00  CNT    { reg=A, max=1ffffffh} L01  

WCAP { next=L00,pin=0,event=BOTH,reg=A,irq=ON,data=0};

 

 

I enabled the interrupt and test the HET interrupt with other halcogen generated code, but my het program do not do interrupt.

 

 

Is there any error in my het code. Or should I need to add somethin?

 

Best Regards,

Mate

 

  • 0
    TI__Genius 13810 points

    To enable this interrupt, please check:

    1. R4F cpu CPSR I, F bit are cleared.

    2. the VIM channel for HET is enabled (can be configured through HalCogen).

    3. HETINTENAS register inside the NHET is enabled.

    I did not use HalCoGen for NHET interrupt before.

    If you can not get it work, let me know.

    Regards,

    haixiao

     

  • 0 in reply to Haixiao Weng
    Intellectual 640 points

    Hello,

    I'm having the same problem on my TMS570HDK. My HET code has been written using the HET IDE and the startup code by HalCoGen. The 7th line of the HET programme is a PCNT instruction with the interrupt enabled.

    When I set a breakpoint in my isr it never hits it.

    After halting the run I find the following things have been set up:

    NHETINTENAS = 0x00000040

    NHETINTFLG = 0x00000040

    in my code in front of the ISR is

    #pragma CODE_STATE( IC_APP_IC1_Isr, 32)

    #pragma INTERRUPT( IC_APP_IC1_Isr, IRQ)

    I also have in sys_main

    _enable_IRQ();

    in sys_vim

    static const t_isrFuncPTR s_vim_init[129U] =
    {
        &phantomInterrupt,
        &esmHighInterrupt,
        &phantomInterrupt,
        &rtiCompare0Interrupt,
        &phantomInterrupt,
        &phantomInterrupt,
        &phantomInterrupt,
        &phantomInterrupt,
        &phantomInterrupt,
        &phantomInterrupt,
        &phantomInterrupt,
        &IC_APP_IC1_Isr,
        &phantomInterrupt,
    the rest are phantoms

    I have a line that writes 40 to the flag register to clear it. The flag register gets set again to 40, so the HET is setting the interrupt flag, but it's not vectoring to the isr.

    Is the isr address in the right location in the vector table. If so, what have I missed?

    Thanks

    Andy

  • 0 in reply to Andy Worsley
    TI__Genius 13810 points

    1. NHET can generate two different interrupt requests, No. 10 (what you mapped) and No. 24.  It depends on the settings of HETPRY. here the TRM (says level 1 and level 2) does not match the datasheet - says level 0 and 1. Anyway, to make it simple, map both of them to your ISR.

    2. There is a interrupt enable/mask register, REQENASET0-2, you need to set the according bit to 1.

    If it still does not work, upload your project, I can take a look.

    Regards,

    Haixiao

    EDIT:  (afs) just to clarify - REQENASET registers are part of the VIM;  the interrupt needs to be enabled in N2HET to get sent to VIM, and needs to be enabled as Haixiao says in the VIM before making it to the CPU.