I use Halcogen to generate code for sci transmit with interrupt.But it seems that it require
additional code for enable IRQ. is there any document for this?
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I use Halcogen to generate code for sci transmit with interrupt.But it seems that it require
additional code for enable IRQ. is there any document for this?
adding this to .c file will enable the IRQ
asm(" cpsie i");
Regards,
haixiao
HalCoGen generates a function "_enable_IRQ()", which is callable from C. Do not forget the leading underscore.
Jan,
there is no automatic setting in HalCoGen to enable interrupts. And, I think it does not make sense to have interrupts enabled automatically before you enter "main()". At the beginning of main usually there are some specific additional setups and the last step before you enter the control loop is to call _enable_IRQ().
Jan,
As it was mention in a reply, it's up to the user to defined when to enable interrupt.
Halcogen provides the routine, but you have to call it whenever your application is ready to handle interrupt.
Please if this question is answered, mark the reply as verified so we can close this thread.
Hi,
i am using HALCOGEN to generate code for TMS570LS07PGE. Somehow _enable_IRQ() is not resolving and ending up with linker error: no definition for "_enable_IRQ" .
But its resolving asm(" cpsie i"); by calling this and interrupts are actually gettting triggered.
Would like to know why this call is not being resolved?
Thank you.
Rambabu
Rambabu,
You would either need to:
1. use the function (in assembly) from sys_core.asm but it's name is _enable_interrupt_ and it enables both IRQ and FIQ. Make sure to include sys_core.h in your C file that uses the assembly function.
2. use the compiler intrinsic _enable_IRQ( ) which appears to be what you are doing. But you need to be compiling in ARM mode in order to use this intrinsic. See section 6.8.1 of the compiler reference manual ... it mentions ARM mode as a requirement in the paragraph before table 6-7. However note that this does not translate to CPSIE for cortex R4 instead it is the older style MRS / BIC / MSR sequence. Not sure why the implementation is this way.
3. Use the inline assembly to put the CPS instruction in your code as you tried. This should work in either ARM or THUMB mode as there are encodings for CPS in both ARM and T2 states.
4. write your own version of 1. that just enables the IRQ (not the IRQ and FIQ).