Cannot exit the selftest on debug

Hello Matteo,

I have forwarded your question to our experts and they will respond soon.

Matteo,

What silicon revision do you have? 

You can check http://e2e.ti.com/support/microcontrollers/hercules/w/design_notes/2543.how-to-identify-the-die-revision-for-rm4xx-products.aspx  to see where to read the silicon rev.  It should be in the same place on TMS570 parts as well as RM4.

I believe Revision A silicon has an errata that affects this function.

If you have some other revision, then please let us know what is written to MSIENA and MINISTAT.

You're looking for the PBIST that didn't complete... so which bit or bits in MSIENA is set but the corresponding bit in MINISTAT is not set.   This tells you the individual memory that's the problem.    MSTCGSTAT has just the overall status so you can't tell who is the problem from this register alone.

Hi Antony,

it's an 'A' revision. So nothing to do?

Yesterday at 5pm it has refused to start for the rest of the evening but this morning all it's ok.

There's some workaround I can try or the only way is retry until it starts?

Matteo,

I'd suggest upgrading to Rev. C silicon if possible.

With this revision A silicon, there's an issue during power up where some power domains don't turn on.

The RAM's in those domains therefore don't initialize and you get stuck in this PBIST loop.

For now - You can either:

  a) remove these PBIST functions from your startup code (deselect in HalCoGen)

  b) power cycle the board until you have it startup in a state where it gets past these tests.

That's about all you can do with Rev A silicon.   Sorry for the trouble with this. 

"remove these PBIST functions from your startup code (deselect in HalCoGen)" means deselect "Enable PBIST Self Check" in the "SAFETY INIT" tab of halcogen?

I've tried but it does not work.

I'm surprised to found a bug of this relevance in a "safety" platform. How can I be sure this will not affect my production target?

Matteo,

matteo lucarelli said:

Check" in the "SAFETY INIT" tab of halcogen? I've tried but it does not work.

I checked the template files (on my system: C:\TI\Hercules\HALCoGen\v03.05.02\drivers\TMS570LS3137ZWT\SYSTEM570v000).   The template for sys_startup.c has the call to memoryInit() guarded by

#if %%SYSTEM:RAM_ECC_ENABLE%%

    /* Initialize CPU RAM.
     * This function uses the system module's hardware for auto-initialization of memories and their
     * associated protection schemes. The CPU RAM is initialized by setting bit 0 of the MSIENA register.
     * Hence the value 0x1 passed to the function.
     * This function will initialize the entire CPU RAM and the corresponding ECC locations.
     */
    memoryInit(0x1U);

So it looks like you should turn off ECC to the TCM RAM if you want to avoid this issue.

Again this is only an issue for the Rev A silicon on your HDK;  and a short term workaround you can use to keep moving while you're waiting to get a newer Rev silicon.

matteo lucarelli said:

I'm surprised to found a bug of this relevance in a "safety" platform. How can I be sure this will not affect my production target?

The rev A silicon on your HDK isn't qualified for production;  it's TMX silicon and was the first set of samples produced.    Revision B and C are production qualified and they have this errata fixed.  But please always check the errata.   Safety doesn't mean the part is errata free;  they're actually two very different concepts. 

Antony,

I've disabled both the ESRAM check in halcogen:

but my problem is still there.

I'm going to order a new HDK hoping this one will be a Rev B or C. In the meantime: other suggestion?