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TMS570LS20216 CCMR4

Hello,

I've been trying to use the self-test force error on the CCMr4 without success.

The code looks as follows:

sCCMR4Reg->CCMKEYR = 0xF;

if (sESMReg->ESMSR1 & (1<< 31) )

{

  TestPass = TRUE;

}

When reading the ESM register, bit 31  never gets set. When the code is executed the system clock is at 16 Mhz and running in non-debug mode.

Can anybody tell me what have I done wrong ? Is there anything that must be set or initialized before initiating this test ?

Any available example code ?

Thanks for your help

Normand

  • Hello Normand,

    I have forwarded your question to one of our experts and they will respond soon.

  • Normand,

    CCMR4 test has to be run without the connection to the debugger. You need to follow the following steps.

    (1) Program your test code to Flash.

    (2) Disconnect debugger from CPU.

    (3) Do a power-on-reset to start the test.

    (4) Connect the debugger to CPU to check the status or you can toggle an I/O pin in your test code to indicate the status.

    Thanks and regards,

    Zhaohong

  • Hello,

    That is the exact procedure I've performed.

    I do not get the expected result. Could you provide a sample code ?

    Thanks

     

    Normand

  • Normand,

    The CCM self-test error forcing mode is started by writing 0xf into the CCMKEYR register. When the test finished, the
    ESM signal will be set high and the ESM interrupt flag will be set. In the beginning of the test, you need to enable the ESM channel. I am attaching a section of code from a validation test to illustrate the steps.

    main()
    {
     /*If the Compare fails CCM7 error signal will asserted and send to ESM module */
    /*Setting up the ESM for action if error occurs*/            
        ESM_EnableChannel_Lower(ESM_SELF_TST);
        VIM_EnableReqIRQInt_Lower(ESM_INT);

    //Initialise Vector table & enable interrupts
       VIM_RAM_Init();                                
       swi_enable_fiq();    

    /* Setting the SELF TEST Error forcing mode */   
        CCM_Ptr->CCMKEYR_UN.CCMKEYR_ST.MKEY =0x0F;   

     /*Waiting for interrupt flag to confirm the interrupt is occured*/
        while(!selftestFlag);  


        if(ESM_Ptr->ESMEPSR_UN.ESMEPSR_ST.EPSF !=0) /*if error occurs this signal have to be LOW*/
                error =-2;    
        selftestFlag=0;
        swi_disable_fiq();
        ESM_Ptr->ESMEKR_UN.ESMEKR_ST.EKEY = 0x05;    /*clear  the error  in the pin making to 0ne*/
        while(!ESM_Ptr->ESMEPSR_UN.ESMEPSR_ST.EPSF);
        while(ESM_Ptr->ESMEKR_UN.ESMEKR_ST.EKEY != 0x00);
        if(error != 0)
        {
            asm("Failed:NOP");
            pstatus=1;    
        }
        else
        {
            asm("Passed:NOP");
            pstatus=0;
        }
    }

    Thanks and regards,

    Zhaohong

  • Normand,

    Does this answer resolve your issue?

  • Hello Henry,

    I've tried the suggested procedure and still without success. I even tried writing 6 to the CCMR4 MKEY register and monitored the STC bit in the CCMR4 Status register and it never completes.

    Here is a resume of what I've been able to check:

    1) NOTE: The debugger is not active, it is disconnected before the test is performed.

    2) I've checked the clocks such that HCLK = 100Mhz and VCLK and VCLK2 = 50 Mhz.

    3) Noticed that if I do not write 0x06 to the CCMR4 Key reg prior to writing 0x0F, the register value never changes

    Are there any other registers that need configuring prior to using the CCMR4 self-testing capability ?

    Any idea what could be the cause?

    Thanks for your support

    Normand