rm48l952 emif (write and chip select)

Elavarasan Selvaraj

Other Parts Discussed in Thread: RM48L952

hi,

we are facing problem with emif write access (using our own custom design board, rm48l952). the problem is, three write cycles are coming for single write. but if i read , only one read cycle is happening.

chip select width also getting increased for write access. what might be the issue?

eg:

single read: cs width = 250ns, rd width = 250ns.

single write: cs width = 750ns, wr width = 3x250ns

need help on this issue.

thanks and regards,

elavarasan.

over 11 years ago

0 John Hall over 11 years ago

TI__Genius 9015 points

Hello Elavarasan,

I have forwarded your question to one of our experts and they will respond soon.

0 Sunil Oak over 11 years ago

TI__Mastermind 49120 points

Hi Elavarasan,

You need to configure the external memory as "device" type using the CPU's memory protection unit (MPU).

See this thread: http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/188446/684175.aspx#684175 for example MPU initialization code as well.

Regards, Sunil

0 Elavarasan Selvaraj over 11 years ago in reply to Sunil Oak

Prodigy 70 points

hi sunil,

thanks for your valuable reply. i have added that code in my application. but still problem is there.

if i use 64 bit pointer in my software, write read is happening fine. so that more confusion. not able to use A0,A1 and A2.

16 bit pointer is not working. why this is happening?

regards,

elavarasan

0 Sunil Oak over 11 years ago in reply to Elavarasan Selvaraj

TI__Mastermind 49120 points

Hi Elavarasan,

Please make sure that the system module register GPREG1 bit 31 is set, as described in the technical reference manual, SPNU503b page 223. This register is at address 0xFFFFFFA0. This bit controls multiplexing between EMIF signals and N2HET2 signals.

Regards, Sunil

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rm48l952 emif (write and chip select)