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MibSPI TG Interrupts

Other Parts Discussed in Thread: HALCOGEN

I have seen the posting under the subject: TMS570 MibSPI mode with DMA ] How to clear tg transfer suspend interrupt flag in TGINTFLAG but am no wiser as to how to solve my problem, therefore I open a new post here.

I set up two TGs for the MibSPI.  TG0 has a buffer length of 64 and uses DMA transfer with frame size of 16.  TG1 is set up for a single byte manual transfer, i.e. Tx data is written to the Tx RAM directly by the CPU.  In order to allow TG1 to run after a TG0 transfer (as suggested in some of the other earlier posts), I set up the "TG finish" interrupt for TG0.  Upon the interrupt, I disable the TG0 by clearing TGENA bit.  This should allow the TG sequencer to process TG1 and it works for the first time.  However, a TG finish interrupt is generated immediately after the TG0 is re-enabled for a new transfer.  Examining the TG interrupt flag, it appears that the interrupt flag does not get cleared after the interrupt notification.

Any suggestion on how to overcome this?  Also if I use 3 TGs, is it necessary to disable both TG0 and TG1 in order for TG2 to run?