I think this a documentation clarity issue (although I may have missed a point in the documentation).
The CAN peripheral appears to have three sources of interrupt, status change, error and recieve/transmit.
If the interrupt is a status change or a receive/transmit interrupt it is indicated in the interrupt register (CANINT).
Status change interrupts are acknowledge by reading the CAN status register, recieve interrupts are acknowledged by reading the message and transmit interrupta are acknowledged by an explicit clear (which the TIVA documentation sayas should not be necessary if the usual interrupt action is taken but I don't see any 'usual interrupt action' that would clear it implicitly).
That only leaves the error interrupt which has no obvious way to clear or recognize. What I suspect is that the error interrupt is misnamed and the bit is not enabling a separate interrupt as the data sheet (TM4C120E6) claims but is enabling the status interrupt for a subset of sources. Since that is not the way it is written though I think it needs to be clarified.
Robert