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RM48L952 HETPINDIS pinmux information

Zhong Liu
Prodigy 100 points

Other Parts Discussed in Thread: RM48L952, HALCOGEN

Hi,

According to RM48L952 Datesheet. There are two HETPINDIS pins which connected to GIOA[5] & GIOB[2].

But there is no such options to enable GIOA[5] for HET1 in HALcogen. And I've checked RM48 TRM. There is no comment about PINMUX setting for GIOA[5] used as HETPINDIS.

Would you please provide such information? Thanks!

Some applications require the N2HET outputs to be disabled under some fault condition. The N2HET module provides this capability via the "Pin Disable" input signal. This signal, when driven low, causes the N2HET outputs identified by a programmable register (HETPINDIS) to be tri-stated. Please refer to the device specific technical reference manual for more details on the "N2HET Pin Disable" feature. GIOA[5] is connected to the "Pin Disable" input for N2HET1, and GIOB[2] is connected to the "Pin Disable" input for N2HET2.

  • 0
    TI__Mastermind 30845 points

    Hi Zhong,

    we will get back to you shortly.

    - Forum support

  • 0 in reply to A Arora
    TI__Guru 69070 points

    Zhong,

    The HalCoGen program contains a hard-coded N2HET program and it doesn't have any selection for the pin disable function.

    You can try to use the pin disable function with the existing PWMs though by setting the HETPINDIS[n] bit for the pins that you are using as PWM.

    Regarding the pinmux,  there are two key points:

    1) unless otherwise specified, 'Inputs are broadcast to all multiplexed functions'.   See the note on page 222 of SPNU503B.

    2) GIOB[2] which is used for N2HET[2] can be sourced from 2 pins, so you might need to change the pinmux for its *input* if you want to use the alternate input location.  See "Generating Interrupt when fault is indicated to N2HET2" on page 223 of the same doc.