Hello there,
I am trying a simple SPI communication with the Master and the master is running in MibSPI mode with the same chip.
I am implementing the slave on another card with TMS570LS3137 in compatibility mode.
My aim is to receive each byte or a word at a time and expect an interrupt which will respond with the tx data based on the received data.
I am receiving data in a sequence 0X01 0X00, 0X02 0X00, 0X03 0X00 and 0X04 0X00. I expect an interrupt after every 2 bytes of data and then for 0X01 I will respond with 0X99 0X00 and so on.
Below is my code.
#include "mibspi_regs.h"
FUNC(void, SPITMP_CODE) Spi_Init(void)
{
/* Initialize MIBSPI3 */
mibspiREG3->GCR0 = 1; /* bring out of reset */
mibspiREG3->MIBSPIE = 0; /* disable multi-buffered mode */
mibspiREG3->GCR1 = (0 << 0) /* set as slave */
| (0 << 1); /* clock is externally generated */
/** SPI1 enable pin configuration */
mibspiREG3->ENAHIGHZ = 0; /* ENABLE HIGHZ */
mibspiREG3->PCFUN = (1 << 0) /* use SPI3CS[0] as SPI, rest as GIO pins */
| (0 << 8) /* use SPI3ENA as GIO pin */
| (1 << 9) /* use SPI3CLK as SPI functional pin */
| (1 << 10) /* use SPI3SIMO[0] as SPI functional pin */
| (1 << 11); /* use SPI3SOMI[0] as SPI functional pin */
mibspiREG3->PCDIR = (0x00 << 0) /* SPI3CS[0-3] are inputs */
| (0 << 9) /* SPI3CLK is an input */
| (0 << 10) /* SPI3SIMO[0] is an input */
| (1 << 11); /* SPI3SOMI[0] is an output */
/** - enable interrupts */
mibspiREG3->INT0 = (0 << 9) /* TXINT */
| (1 << 8) /* RXINT */
| (0 << 6) /* OVRNINT */
| (0 << 4) /* BITERR */
| (0 << 3) /* DESYNC */
| (0 << 2) /* PARERR */
| (0 << 1) /* TIMEOUT */
| (0); /* DLENERR */
/** - Delays */
mibspiREG3->DELAY = (0 << 24) /* C2TDELAY */
| (0 << 16) /* T2CDELAY */
| (0 << 8) /* T2EDELAY */
| 0; /* C2EDELAY */
mibspiREG3->FMT0 = (8 << 0) /* set data format to 16-bit words */
| (7 << 8) /* set SPI clock to 10MHz */
| (0 << 16) /* no phase delay */
| (0 << 17) /* SPI3CLK is active low */
| (0 << 18) /* use C2TDELAY and T2CDELAY */
| (0 << 19) /* normal full duplex transfer */
| (0 << 20) /* MSB is shifted out first */
| (0 << 21) /* do not wait for ENA */
| (1 << 22) /* transmit parity bit */
| (1 << 23) /* parity bit is odd */
| (254 << 24); /* WDELAY*/
mibspiREG3->PMCTRL = 0; /* single line mode */
/** - clear any pending interrupts */
mibspiREG3->FLG = 0xFFFFFFFFU;
mibspiREG3->ENA = 1; /* start MIBSPI3 */
/* Initialize MIBSPI5 */
mibspiREG5->GCR0 = 1; /* bring out of reset */
mibspiREG5->MIBSPIE = 0; /* disable multi-buffered mode */
mibspiREG5->GCR1 = (0 << 0) /* set as slave */
| (0 << 1); /* clock is externally generated */
mibspiREG5->PCFUN = (1 << 0) /* use SPI5CS[0] as SPI, rest as GIO pins */
| (0 << 8) /* use SPI5ENA as GIO pin */
| (1 << 9) /* use SPI5CLK as SPI functional pin */
| (1 << 10) /* use SPI5SIMO[0] as SPI functional pin */
| (1 << 11); /* use SPI5SOMI[0] as SPI functional pin */
mibspiREG5->PCDIR = (0x00 << 0) /* SPI5CS[0-3] are inputs */
| (0 << 9) /* SPI5CLK is an input */
| (0 << 10) /* SPI5SIMO[0] is an input */
| (1 << 11); /* SPI5SOMI[0] is an output */
/** - enable interrupts */
mibspiREG5->INT0 = (0 << 9) /* TXINT */
| (1 << 8) /* RXINT */
| (0 << 6) /* OVRNINT */
| (0 << 4) /* BITERR */
| (0 << 3) /* DESYNC */
| (0 << 2) /* PARERR */
| (0 << 1) /* TIMEOUT */
| (0); /* DLENERR */
/** - Delays */
mibspiREG5->DELAY = (0 << 24) /* C2TDELAY */
| (0 << 16) /* T2CDELAY */
| (0 << 8) /* T2EDELAY */
| 0; /* C2EDELAY */
mibspiREG5->FMT0 = (8 << 0) /* set data format to 8-bit words */
| (7 << 8) /* set SPI clock to 10MHz */
| (0 << 16) /* no phase delay */
| (0 << 17) /* SPI5CLK is active low */
| (0 << 18) /* use C2TDELAY and T2CDELAY */
| (0 << 19) /* normal full duplex transfer */
| (0 << 20) /* MSB is shifted out first */
| (0 << 21) /* do not wait for ENA */
| (1 << 22) /* transmit parity bit */
| (1 << 23) /* parity bit is odd */
| (255 << 24); /* WDELAY*/
mibspiREG5->PMCTRL = 0; /* single line mode */
/** - clear any pending interrupts */
mibspiREG5->FLG = 0xFFFFFFFFU;
mibspiREG5->ENA = 1; /* start MIBSPI5 */
}
And my ISR looks like
void ISRSPI3(void)
{
VAR(uint32, AUTOMATIC) vec;
VAR(uint32, AUTOMATIC) IntFlgs_Cnt_T_u32;
VAR(uint16, AUTOMATIC) RxBuff_Cnt_T_u16;
vec = 0x24u & mibspiREG3->INTVECT0;
IntFlgs_Cnt_T_u32 = mibspiREG3->FLG;
if (vec == 0x24U)
{
RxBuff_Cnt_T_u16 = mibspiREG3->BUF;
RxBuff_Cnt_T_u16 = (RxBuff_Cnt_T_u16>>8) & 0X0F;
switch(RxBuff_Cnt_T_u16)
{
case 0X01:
mibspiREG3->DAT0 = 0XFFFEu;
break;
case 0X02:
mibspiREG3->DAT0 = 0XFFFDu;
break;
case 0X03:
mibspiREG3->DAT0 = 0XFFFCu;
break;
case 0X04:
mibspiREG3->DAT0 = 0XFFFBu;
break;
}
}
else
{
}
}
And
void ISRSPI5(void)
{
VAR(uint32, AUTOMATIC) vec;
VAR(uint32, AUTOMATIC) IntFlgs_Cnt_T_u32;
VAR(uint16, AUTOMATIC) RxBuff_Cnt_T_u16;
vec = 0x24u & mibspiREG5->INTVECT0;
IntFlgs_Cnt_T_u32 = mibspiREG5->FLG;
if (vec == 0x24U)
{
RxBuff_Cnt_T_u16 = mibspiREG5->BUF;
RxBuff_Cnt_T_u16 = (RxBuff_Cnt_T_u16>>8) & 0X0F;
switch(RxBuff_Cnt_T_u16)
{
case 0X01:
mibspiREG5->DAT0 = 0X9900;
break;
case 0X02:
mibspiREG5->DAT0 = 0X9800;
break;
case 0X03:
mibspiREG5->DAT0 = 0X9700;
break;
case 0X04:
mibspiREG5->DAT0 = 0X9600;
break;
}
}
else
{
}
}
I have enabled the interrupts using channel 37 and 53 and I also get other interrupts if enabled, so the ISR is setup fine.
However I am not getting the RxBuf Full interrupt. Also the Master is in multi buffer mode and sends the data pretty fast, so I will have to make the master wait between the time I serve the interrupt.
Please let me know where am I making mistake.
Appreciate any help.
