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lm3s9u81 LIN Slave Sync Break Interrupt Not working

Christopher Corbett
Prodigy 30 points


Dear ti-support,

I am using a Stellaris  LM3S9U81 at work. I configured the UART0 as a LIN Slave and enabled the SyncBreak, RX, and RT interrupt.

Problem is, the first SyncBreak on the bus is recognized correctly and the interrupt flag is set. I reset the flag in my ISR and the SyncBreak Interrupt never occures again when messages are received. All registers (UART_IM_RXIM, UART_IM_RTIM, UART_IM_LMSBIM, UART_IM_LME1IM and  UART_IM_LME5IM) are set properly and the lines of code have been checked by severall colleagues.

Our suggestion is, that there must be some kind of hardware fault, which prevents the interrupt from occuring again.

Any kind of assistants would be very nice.

regards

Christopher Corbett

  • 0
    TI__Intellectual 2400 points

    Christopher,

    There are some known erratum involving the use of LIN mode on LM3S9U81.  Please review section 11, particularly 11.2 and 11.3 and ensure that these are accounted for via suggested workaround or avoided (if possible).

    LM3S9U81 Errata:
    http://www.ti.com/lit/er/spmz578e/spmz578e.pdf

    Regards,
    Chris

  • 0 in reply to Chris Rivera
    Prodigy 30 points

    Thank you Chris for you quick response. We already checked the erratum document. The problems mentioned in the document don't concern the LIN in slave mode. 

    Do you have some example codes or projects for the lin slave to test on our chip or lin sample projects in general? If that works on our chip, we could narrow it down being a software problem instead of a hardware problem. 

    I searched the forum but unfortunately couldn't find any examples or code snippets. 

    Thanks

    Chris

  • 0 in reply to Chris Rivera
    Prodigy 30 points

    Hello Chris,

    the problem still exists. Is there a chance to get any sample code to verify our problem?

    regards

    Chris

  • 0 in reply to Christopher Corbett
    TI__Intellectual 2400 points

    Chris,

    I have searched for good while, but have not been able to find any internal examples which utilize the LIN mode feature of the UART.  I did come across this post on what sounds like a similar topic.  It would appear that the issue went unresolved, but the user found a work around.

    Digging a bit deeper, according to the data sheet:

    After detecting a Sync Break, the UART waits for the synchronization field. The first falling edge generates an interrupt using the LME1RIS bit in the UARTRIS register, and the timer value is captured and stored in the UARTLSS register (T1). On the fifth falling edge, a second interrupt is generated using the LME5RIS bit in the UARTRIS register, and the timer value is captured again (T2). The actual baud rate can be calculated using (T2-T1)/8, and the local baud rate should be adjusted as needed. Figure 13-5 on page 687 illustrates the synchronization field. 

    Can you please confirm that both the Sync Break and Sync Fields are being send and that LME1RIS and LME5RIS interrupts are being set by checking the UARTMIS and UARTRIS registers?

    Regards,

    Chris