Acquire one DI in sync with ADC

ADC Channel Last Conversion Value Register (ADLASTCONV)

Do this register in the ADC module meet your requirement?

Unfortunately, no.

ADCLASTCONV gives some "digital" ability to the ADC input but this are limited to the effectively acquired ADC channels.

What I need is someway to acquire a DI (from GIO or another similar device) in sync with my ADC.

Im my design the DI acquisition could, in theory, be realized triggering a DMA every ADC single conversion but, beeing this way yet used for ADC fast data transfer, this would realize a DI at the same speed of the ADC (1M) so I don't trust this would be compatible with the board performace. From my tests 1.2M is the limit for continuous data transfer using DMA triggered every ADC sample (and this is the more efficient method I've found).

There's another way to trigger a DI for example every 256 ADC sample without interfere with my continuous fast ADC? Will a threshod interrupt interfere with the "DMA request for each conversion"?

Note that currently my ADC is triggered by HET1 pin  (on wich I generate my frequency) and I cound generate on another HET pin the right frequency to acquire DI but I don't see a similar way to trigger a DI acquisition. Isn't it?

Thank you.

Matteo,

sorry for my unability to understand what you are trying to do, so i will attempt to ask a few questions.

When you mentioned ADC DI.  what do you mean?  Is it the conversion result in the digital value or the analog data input (DI) side ?

it is very hard for me to understand what you are trying to do at a big picture.

Do you any high level diagram that you can provide?

Matteo,

Your best bet I think is to add the DI capability into your HET program.

You can capture a digital input on any of the HET pins with the 'SHIFT' instruction among others.

HET can also trigger SPI so in theory you could try that but it would be more awkward than just capturing the DI on a HET pin.

Antony,

I'm not using the HET programming and moreover I'm currently using the HET output for another function so I don't think the HET is a viable solution.

Henry,

What I need to know is the status of one digital input in the same moment of my ADC sample.

My current ADC is working in continous at a high rate (1M sample or more). To trigger the ADC I'm currently using the RTI and to move data in a bigger buffer a DMA event is generated every ADC sample. I cannot drive the DMA to acquire digital input at the same ADC frequency because this would surely generate performance problem.

The good news is that I can acquire the digital input at a lower frequency because I need to know the digital status al least every 256 ADC sample.

Probably the best way would be to use another RTI compare to generate an interrupt or a DMA event where get the digital input data.

This way, beeng software driven, will not ensure a hard sync between the DI status and the ADC sample but I'm confident that the timing would be enough for my requirement.

Isn't it?

Matteo

NOTE: most PCI board give the ability to write some digital input in the same data word of the ADC. For example if the ADC is acquiring a 12-bit sample the 4 free bits can be programmed to represent 4 digital input status at the moment of the sampling. Being written on the same word buffer this ensure a hard sync between the ADC and the DI data. This is the behaviour I need to replicate.