Problem with my bootloader

Hi Pablo,

looks like it is not flashed correctly.  can you verify that you have correctly program your flash?

The application is downloaded to the flash. Below the Interrupt vectors I can see the code I have developed. It seems that it loaded the application with no problems.

I noticed something. According to the linker file, the section .intvecs is located at 0x0 and I put the code there for branching to the determined interrupt. But according to the .map file, the file containing the interrupt vectors is being loaded in another region.

SEGMENT ALLOCATION MAP

run origin  load origin   length   init length attrs members
----------  ----------- ---------- ----------- ----- -------
00000020    00000020    00000d02   00000d02    r-x
  00000020    00000020    00000d02   00000d02    r-x .text
00000d24    00000d24    00000814   00000014    rw-
  00000d24    00000d24    00000014   00000014    rw- .data
  00000d38    00000d38    00000800   00000000    rw- .stack
00001538    00001538    00000028   00000028    r-x
  00001538    00001538    00000004   00000004    r-x .intvecs
  00001540    00001540    00000020   00000020    r-- .cinit

The thing is that my intvecs file contains the following:

    .sect ".intvecs"
    .arm

    .ref    bootAfterReset    ;    This is what the Reset Interrupt must be called

    b    bootAfterReset

And my linker file contains:

MEMORY{
    VECTORS (X)  : origin=0x00000000 length=0x00000020
    FLASH0  (RX) : origin=0x00000020 length=0x0017FFE0
    FLASH1  (RX) : origin=0x00180000 length=0x00180000
    STACKS  (RW) : origin=0x08000000 length=0x00001300
    RAM     (RW) : origin=0x08001300 length=0x0003ED00


    VECTORS (RW) : origin=0x00000000 length=0x00000020
    FLASH0  (RW) : origin=0x00000020 length=0x0017FFE0
    FLASH1  (RW) : origin=0x00180000 length=0x00180000
    STACKS  (RW) : origin=0x08000000 length=0x00001300
    RAM     (RW) : origin=0x08001300 length=0x0003ED00
}

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */
SECTIONS{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0 | FLASH1
    .const   : {} > FLASH0 | FLASH1
    .cinit   : {} > FLASH0 | FLASH1
    .pinit   : {} > FLASH0 | FLASH1
    .bss     : {} > RAM
    .data    : {} > RAM
    .stack     : {} > STACKS
}

Pablo,

Why the memory regions VECTORS, FLASH0, FLASH1, STACKS, RAM are duplicated in the linker command file?

Are you sure you don't have any warning or error during link time?

There are no errors and only 2 warnings. One of them because the initial project was created with CCS 4.9 and I'm now using CCS 5.3 and the other one I can't remember (I don't have the code with me now), but it's not related to the linker file. The repetition you see there is because I copied and pasted it from 2 different files (I had lots of things to do at the time and I was running around), but the first one is the correct one. 

Ok. I created a new project and it gave me the following warnings:

- creating ".stack" section with default size of 0x800; use the

- creating output section ".intvecs" without a SECTIONS

Pablo,

Will it be possible to share your project?

I can provide you a private email if you don't want the code on the public forum.

Please let me know.

Hello,

First of all I'd like to thank you all for your help, but I've been able to solve it. I just renamed the linker file and made the project point to it. It worked ... I don't know why, but it worked.

I'd really like to thank you for your time and your attention.

But I have another question. How do I get rid of the "creating ".stack" section with default size of 0x800; use the" warning?