The Tiva Development Kit with Ethernet is out. I just saw this at facebook TI Microcontrollers. So, I thought I will just share the link. Here is the link below.
http://www.ti.com/tool/dk-tm4c129x
-kel
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The Tiva Development Kit with Ethernet is out. I just saw this at facebook TI Microcontrollers. So, I thought I will just share the link. Here is the link below.
http://www.ti.com/tool/dk-tm4c129x
-kel
I'm planning to hook a 320x240 LCD display to the TM4C129X. The brochure mentions an LCD Control Module, but the datasheet doesn't provide any information. Is there separate information regarding the LCD Control Module and how to use it?
No need to do it yourself. The DK-TM4C129X comes with a 320x240 QVGA display. The TivaWare 2.0 development software package has examples on how to use it.
The full datasheet of the product contains material available only under NDA. When you go to http://www.ti.com/lit/ds/symlink/tm4c129enczad.pdf you will see a PDF with the NDA and a link to the full datasheet. By clicking the link you are accepting the NDA.
Dexter
The LCD controller can operate in one of two modes. It can connect to displays which contain integrated frame buffers and controllers and talk via packet-based protocols (known as LIDD mode), or it can connect to "bare" displays using a video (VSYNC/HSYNC/CLK/DATA) interface (known as Raster mode). The QVGA display on the DK-TM4C129X uses the LIDD mode. If you are interested in driving a raster mode display, there will be example code and graphics library display drivers for these in the TivaWare 2.1 release which you should see early in 2014.
Hi Dexter,
I have a constraint in that I must use a particular LCD display. It does not have a controller therefore I need to write each row at a consistent rate of 18 kHz. At the moment I'm using an LM3S9D96 micro and an interrupt service routine.This takes about 20% of the CPU, but it works well. When I migrate to the TM4C129 (due to the "obsolescence" of the LM3S9D96) I' m hoping to use the LCD Control Module, thereby getting my 20% of the CPU back (plus a further boost from the 80 MHz to 120 MHz CPU clock increase).
So, as you can see, I'll need to know how to use the TM4C129X's LCD Control Module.
Hi Dave,
Thanks for the info. I'm using an LCD with VSYNC/HSYNC/CLK/DATA interface, so it would be great to offload the "refreshing" of the LCD display to a dedicated control module. But, as I've said, there is no info in the datasheet. I look forward to the example code. I've already written my own graphics library (sucker for punishment) since I wanted it to be lean and fast and all I need is fonts, lines and rectangles. (Plus it was fun to write.)
So, looking forward to TivaWare 2.1. In the mean time, my 18 kHz interrupt routine can be used as an interim measure with the TM4C129X. Who knowns, I may just try to get it working through guesswork. If you have some preliminary information, even a a rough draft, it would reduce my coding-by-guesswork time.
Regards, Vito
Vito,
The LCD controller is definitely documented in the TM4C129XNCZAD datasheet that I have here. Are you clicking through the NDA to get the full datasheet or just looking at the product brief? Even if you haven't got the datasheet, if you download TivaWare 2.0.1 you'll find a driver for the LCD controller and documentation for it there. Look for lcd.c and lcd.h in the "driverlib" directory.
Although the DK doesn't use a raster-mode display, the LCD driver contains all the APIs you will need to access one. The new code that I mentioned for 2.1 is just an example showing how to use the raster APIs and the bindings that allow you to connect a raster mode display to the TivaWare Graphics Library. If you have your own graphics library already, you won't need most of that code anyway so I bet you'll be able to make a good start with the LCD API that we've already shipped.
Earlier this week - Sue C. provided a link to this Dev Kit. We followed - and downloaded the MCU datasheet for the QFP part (TMC1290NCPDT) - and no LCD Controller (nor pins - which could be so configured) revealed.
Looking more closely - we noted that both QFP and far more pin equipped BGA device were listed. Our suspicion is that the BGA device is far better equipped (perhaps the only one so equipped) to provide direct TFT drive signals - and also able to transact directly/efficiently w/external memory. (i.e. required TFT frame buffer)
Would you be so good as to comment? Thanks...
You are, indeed, correct. The DK-TM4C129X uses a BGA TM4C129XNCZAD part and, looking at the product selector guide here, I see that this is, in fact, the only TM4C129 series part with the LCD controller available. I didn't realize that was the case!
I can understand that the peripheral is only available in a BGA package, though. The LCD interface uses a large number of pins in its widest mode and, when driving a screen larger than QVGA (the internal SRAM is large enough to hold a 16bpp frame buffer at QVGA resolution), you will generally need to use EPI-connected SDRAM for the frame buffer. The EPI also needs a large number of pins. Add these two together and you end up with a large percentage of the available IO on a QFP package.
Thank you, (once again) Sir - much appreciated. Thought that to be the case - your confirmation soothes.
BGA introduces both assembly & test/verify issues - and we find such parts usually to lurk @ the higher end of the pricing spectrum. (we could find no early mention of price - either the QFP nor BGA versions - of these new devices.)
Glad to have earlier detected - and to have presented - this MCU packaging alternative. (suspect of benefit to others, too)
Again - thanks much for your "crack of the bat" response & most welcome technical detail...
Hi Dave,
Shocked to learn that - and thanks. However - one expects multiple, additional board layers will be required for BGA - so cash register still will, "roar."
Others have produced M4 w/external bus & LCD capability - in more manageable QFP package. Suspect that this would yield best compromise...
Thanks Dave, et al,
So, in summary, for the TM4C129x, the 212 pin BGA variant includes the LCD Controller and the 128 pin TQFP variant does not include the LCD Controller.
Not a deal breaker for me since my 18 kHz interrupt service routine, although it doesn't sound elegant and chews up ~20% of the CPU processing power, does the job for me. (BTW, my LCD display is 320 x 240 and only 1 bit (monochrome - no grey scale)). I also have the option of using a separate controller chip, but this is even less elegant.
Regards, Vito
The 128 does include the external peripheral interface (EPI) which may help drive some simpler LCDs or perhaps at least drive the data lines in a more efficient manner then GPIO. It contains a general purpose mode that is relatively flexible. I don't know but I would suggest Vito take a closer look if constrained to the 128 package.
The DK we have released is done in 4 layers with the 212 BGA. two signals (top and bottom) and two inner plane layers. I believe 4 mil trace and space rules were used. We do place a handful of components (mostly bypass caps) on the back side of the board.
These two packages are what we have planned for the device introduction. Moving forward I anticipate other packages will come. I do not know what those will be or when. I will provide your suggestion to the team which drives those decisions.
Dexter
Hi Dexter,
I think it's important to call everyone's attention to the very helpful document TI has provided that addresses layout and PCB design considerations for the '129s: http://www.ti.com/lit/an/spma056/spma056.pdf
This document was on the site on Saturday (along with datasheets etc), some 3 days before the official announcement date - good job TI!
Regards,
Dave
Dave Wilson said:I can understand that the peripheral is only available in a BGA package, though. The LCD interface uses a large number of pins in its widest mode and, when driving a screen larger than QVGA (the internal SRAM is large enough to hold a 16bpp frame buffer at QVGA resolution)
Hi Dave, at QVGA 150 KBytes are needed for frame buffer, at higher resolution an external ram is necessary so may be in the future some dedicated large (D)ram version appear to support large screen sizes?
bga version has just 212 pin so a large qft can fit same chip, getting an eye to footprint BGA don't scare so much, many adiacent pad are ground or power and escape plan is not so dense to require a multilayer, I bet a dual layer can also be routed still with a decent ground plane under the chip. BGA is smaller and less dense than .4mm qfp, on first prototype qfp is preferable where all pin are accessible to probing.
Roberto Romano said:I bet a dual layer can also be routed still with a decent ground plane under the chip.
I can't tell if by "dual layer" you are referring to a simple, double-sided pcb. If that's the case - establishing that, "decent ground plane" seems unlikely. Suspect that a 4-layer board - which enables a full (outer) layer for ground plane - would be best/safest choice... (and perhaps that's what you meant)
As the first to recognize and report here (8th post, this thread) that "only the BGA" package supported Lcd interface your comments about relative pin pitch (BGA vs. QFP) are of interest. Indeed - our group received "first issue" of LX4F232 Eval Bd. - which was BGA - and physically smaller - than later, reduced pin-count, QFP version.
Suspect that such TFT capable MCUs could be cost-reduced by removing Ethernet - as a desired MCU variant. Having both "flavors" of MCU available warrants consideration...
I'll have to defer comment on this because, as a software guy, I'm sorry to say that I know nothing about the viability of supporting new packages and the economics of adding enormous amounts of on-chip SRAM. I suspect that a "huge SRAM" option would be unlikely, though. Different packages strike me as more plausible but, again, that's a question for someone who knows about packaging and the hardware side of things.
cb1_mobile said:I can't tell if by "dual layer" you are referring to a simple, double-sided pcb. If that's the case - establishing that, "decent ground plane" seems unlikely. Suspect that a 4-layer board - which enables a full (outer) layer for ground plane - would be best/safest choice... (and perhaps that's what you meant)
I meant double sided (same as dual layer), is not the first time I route a single layer with a full ground plane on bottom, BGA footprint not only is smaller but also aligned to a simple routing with less signal pad on inner area.
On end of November start of December I plan to start second part of design so there BGA version is a must, that PCB need 4 or 6 layer but I can try a dual layer to do some test on network can and usb. Layout of BGA is clever enough: all impedance constrained signals appear to be on outer ring pad so a single ground plane can serve to transmission line impedance control.
Roberto Romano said:mpedance constrained signals appear to be on outer ring pad so a single ground plane can serve to transmission line impedance control.
Need comment myself,still on QFP I hit a problem .... Board is routed on a two layer and bottom layer is just a solid plane with very few short track and only component plane is populated by tracks, BGA can route similar but I found no way to match impedances!
Stripline impedance is simple to tune to 100Ohm on differential line, on two layer tracks are too wide, this cannot desturb design but is not simple to tune single ended striplines to half impedance too. Reducing board dielectric reduce also mechanical resilience and board is not stable enough. Using a specific dielectric material raise the cost, so on RF design impedance match can be done by network, on ethernet or worst USB lines strip lines behave bad on single stack layer, is quite perfect on 4 6 layer standard and need manufacturing rule to strict control of stack dimension and dielectric to guarantee impedance matching.
Minimal layer is 3 but this is usually a 4 layer standard and the layer under striplines require to be dimension controlled too.
Dave,
We are working on a design with the 129X driving a 800x480 TFT panel, raster mode. We are going to use a Mikroelektronika TIVA 5 as a development board, using CCS and TI-RTOS. Can you enlighten us on when TivaWare 2.1 release might happen, and if there are any plans for a slightly higher level of graphics capability now or in the future? Any other examples or resources you could point us to would be greatly appreciated.
We are also considering offering the board to the Ti development community if it would be of some benefit. Can you point us to someone at TI that might be of help in that regard?
Regards,
Bob
Bob,
TivaWare 2.1 was release 6 weeks ago and can be downloaded from http://www.ti.com/tivaware. This includes sample drivers allowing you to use the LCD controller with the Tiva Graphics Library (see examples/peripherals/lcd in the installation). These drivers also include sample LCD raster setup parameters for various displays including several 800x480 panels. You may find that one of these is compatible with your display but, if not, it should be easy to update one of the example structures to define the raster timings you hardware needs.
I'm not sure exactly who you would need to talk to about offering your board through TI but I'll draw someone in marketing's attention to this post and they can have someone contact you if it's something they would like to investigate.
As regards future capabilities, I can't comment on what may or may not be planned - sorry.
Dave,
Thanks, I missed that update and CCS doesn't seem to update automatically, will download and manually install it.
Thanks for all the help!
Bob