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Workaround for new PBIST#4 errata advisory

Other Parts Discussed in Thread: HALCOGEN

Hello,

The new TMS570LS31x/21x Microcontroller Errata for Silicon Rev C (SPNZ195C) has a new advisory relating to PBIST.  The workaround is "Ignore the first PBIST result after power up and re-run the PBIST Test. ..."  Does this mean the first time PBIST run on any memory, or the first time PBIST is run with any given algorithm?

For example, HALCoGen 3.06 has the first run of PBIST in sys_startup.c on the CPU RAM using the march13n algorithm.  I assume after this run has been completed, it should be run again.  After this, will PBIST have to be run twice per configuration (algorithm, RAM type, etc.)?  Or are any runs of PBIST in any configuration valid after the first run?

Thanks, Charlie Johnston