Does TMS570LS3137 support two or more interrupts from GPIO at the same time?

Hello,

Yes, each of the dedicated GIO terminals can generate interrupts independently. The GIO module integrates these into two separate interrupt requests to the interrupt manager (VIM). These are the two connections to VIM channels 9 and 23. These correspond to interrupt levels "high" and "low" respectively inside the GIO module. The interrupt level for each GIO input can be configured using the "GIO Interrupt Priority Registers", GIOLVLSET and GIOLVLCLR.

If you do expect two GIO interrupts "at the same time", it is recommended to assign one to be a high-priority interrupt and the other to be a low-priority interrupt out of the GIO module. This way, there will be two interrupts requested to the VIM module, on channels 9 and 23, respectively. The interrupt service routines for these two channels can then handle both the requests one after the other.

Alternatively, you can let both the GIO pins generate an interrupt request at the same level (high or low, per your preference). Then the ISR can address both the requests in the same ISR call. The GIO module has a built-in priority scheme including registers that capture the source of the first interrupt request. These are the GIOOFF1 and GIOOFF2 registers. Reading these registers for the first time will give you the value of the GIO pin that caused the interrupt request first. The read by the CPU will also cause the offset register to show the value of the next GIO pin that caused an interrupt, if any. This way your ISR can manage the interrupts that happen "at the same time".

As an example, also note that if GIOA0 and GIOA2 generate interrupt requests at exactly the same time, then the GIO offset register will show GIOA0 first as there is also a built-in priority between the GIO interrupts. This specific information is missing in the TRM and will be added in the next update.

Regards, Sunil