Simultaneous RAM Access with DMA and CPU

Christian Fuchs1

Hello.

I've configured the DMA to transfer 16bit from SPI to a specific RAM address. The source and destination address of the DMA configuration are fixed.

Is there a posibility that, if I read this RAM address with CPU during the DMA writes to it, I get 5bits from the old and the rest of the new DMA transfer?

Thank you.

Best Regards

Christian

over 12 years ago

0 Henry Nguyen over 12 years ago

TI__Expert 4225 points

Hi Christian,

It is hard to imagine why only 5-bit got updated. I can image that 8-bit or one byte get updated if your address is not aligned to the half-word boundary.

Can you ensure that the CPU does not read the RAM location until it receives completion interrupt from DMA?

0 Christian Fuchs1 over 12 years ago in reply to Henry Nguyen

Expert 1260 points

Hi Henry,

I can not ensure that CPU only reads if DMA gives the completion interrupt.

Thanks for your answer, maybe I deactivate DMA before CPU access or I make a ping pong buffer for DMA.

Best Regards

Christian

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Simultaneous RAM Access with DMA and CPU