Hi All
If you start the LM4F (TM4C) ADC at 1MS/s, are there any samples missing, mis-timed, or grossly in error, and what is the statistical sample variation/error (i.e. via measuring the same waveform repeatedly)?
The experiment here is designed to find deviations from the expected ADC readings:-
Create a test waveform (MCU=80MHz) at exactly 250KHz using an internal PWM signal and low-pass filter :-
Now set the ADC sampling at 1MS/s for a ‘run’ of N samples (typically N=1024 here), then every 4th sample should have the same value. Gather samples into four groups, and compute the rms variation within each group. Every sample within the four samples for one period (4us) using this waveform is different, so any gross timing errors or missing samples will be immediately obvious (leading to high rms variations).
Vary the trigger position for each run of N samples using timer daisy-chain mode, so that all locations (at 62.5ns intervals) within the waveform are covered, then average the results for each run (10 runs per trigger position) to show the trend better. After some trial-and-error to achieve the lowest rms sample variation, I see the following :-
This shows the rms sample variation (in ADC units/LSB) for triggering the ADC using a timer (at 1MHz), and ADC ‘continuous triggering 1MS/s’ mode (ADC_TRIGGER_ALWAYS). DMA is used for sample collection. There is little obvious difference between triggering by timer, or ‘trigger always’ mode, though here the timer triggering curve looks to be a little smoother over the range.
For V>35% of full-scale, the rms variation drops from about 1.5 rms to below 1.0 rms, which indicates very good repeatability. For 1.0rms, about 70% of samples are within +- 1 LSB (for 2.0 rms, 95% are within +- 2 LSB), indicating 10/11 bit resolution - good for a fairly challenging/fast waveform. The rms sample variation will include any signal noise introduced by the external circuit, and any pickup on the lines into the ADC, so the ADC noise/approximation error will be less than this total, but it indicates a worst-case/upper-bound figure.
There was one problem I had to work around, affecting both types of triggering.
Using a timer to trigger the ADC, I found the following to start with:-
Which was a little alarming ... but it was due to the first sample in a run being completely mis-timed or random. Only some of the range seems to be affected, and why it should not occur also on the falling edge is curious.
On further investigation, I found the following:-
[The ‘ADC rate’ is set with SysCtlADCSpeedSet(), SYSCTL_ADCSPEED_1MSPS for 1MS/s]
The results in this table can be demonstrated most easily using a simple PWM test signal at the same frequency as the trigger timer. Then ideally all the samples should be the same, but you should see these errors for the first number of samples.
It is true that using a timer at, for example, 1MHz to trigger the ADC (at 1MS/s) means that the ADC is ‘always on’, but this mode is versatile, and it is very convenient for triggering two ADC’s in parallel (using ADCPhaseDelaySet() to offset one ADC from the other) to achieve 2MS/s real-time.
However, the same problem also showed itself using the ADC in ADC_TRIGGER_ALWAYS mode :-
Once again, the first sample in a run is in error, but this time by a smaller amount, typically +-10 to 20 ADC units/LSB from the mean value. The shorter run using N=256 is useful to amplify the error here.
So even one sample just a little ‘out-of-tune’ shows a noticeable effect in the rms sample variation in this experiment.
I see the same problem (for both ‘timer trigger’ and ‘trigger always’) if the samples are collected other than by DMA, such as in an ADC interrupt routine ... so it does not seem to be the collection method.
There is an issue reported in the errata for ADC differential mode (‘first sample is wrong’), but the present configuration is single channel.
However, to work around the problem, I simply dropped the first few samples in a run.
Obviously it could be this experiment, or this device version, but I would be very keen to hear from anyone else who sees ‘odd-looking’ first samples, or knows about this issue. Though my configuration is designed precisely to isolate this kind of error, it would be surprising not to have been noticed or reported somewhere.
Jim
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