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VREF problem on TM4C123GH6PZ

Matthias Braband
Prodigy 30 points

Other Parts Discussed in Thread: TM4C123GH6PZ, STRIKE

Hi,

I've ported my software from a stellaris controller to the new Tiva TM4C123GH6PZ. Now I have some trouble with that.

On our project, we use an external 3 V reference voltage for the ADC. I've set the reference to the external voltage in the ADCCTL register but the sampled values aren't in that range I expected.

It seems that the adc still uses the internal reference voltage. A change in the ADCCTL has no effect.

Here is my source code to set up the ADC:

SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);

GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_5);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_4);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2);		
GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_0);		
GPIOPinTypeADC(GPIO_PORTD_BASE, GPIO_PIN_1);		
ADCSequenceConfigure(ADC0_BASE, ADC_SEQUENCE_NUMBER, ADC_TRIGGER_PROCESSOR, 0);
ADCSequenceStepConfigure(ADC0_BASE, ADC_SEQUENCE_NUMBER, 0, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
ADCReferenceSet(ADC0_BASE, ADC_REF_EXT_3V);
ADCSequenceEnable(ADC0_BASE, ADC_SEQUENCE_NUMBER);
 ADCIntClear(ADC0_BASE, ADC_SEQUENCE_NUMBER);

Hope you can help me with this problem.
  • 0
    Guru 86865 points

    Hi Matthias,

         Which ADC pin have you connected your analog input?

    -kel

  • 0 in reply to Markel Robregado
    Guru 117855 points

    Once again - when, "all else fails" - time to consult ever present, "MCU specific, errata."  And therein reveals:

    9 ADC
    9.1 External reference requires additional configuration
    Description:
    Setting the VREF bit of the ADC Control (ADCCTL) register has no effect; VDDA and GNDA are used
    as the voltage reference regardless of the status of this bit.
    Workaround:
    Setting the AMSEL bit for PB6 enables the use of the external voltage reference. Setting this AMSEL
    bit has no effect on the functionality of PB6 as PB6 is not pinned out on this device. For future
    compatibility, software should set both the VREF bit in the ADCCTL register and the PB6 AMSEL bit.

    This errata note appears to precisely target, verify - and then correct - your issue.  Suspect that you can well-handle this, "set of AMSEL bit for PB6."

    In the overall scheme of things - so much is "right" w/these MCUs that many (most), "fail to review the errata - prior to device usage."  Working in the defense & medical fields - our group finds this extra (usually slight) effort most always enables our avoidance of, "hardships" (some, potentially catastrophic) downstream...

    Your, "Verify Answer" (this post) gratefully awaited - bon chance, mon ami...

  • 0 in reply to cb1_mobile
    Prodigy 30 points

    Thank you for your fast answer. I've read the errata from the TM4C123GH6PZ Device. I've also tried to set the PB6 AMSEL bit with no success.

    The problem is the same as before.

  • 0 in reply to Matthias Braband
    Guru 117855 points

    Well - that's not our, "hoped for result."  BTW - w/out mentioning your read & implementation of that errata - others may have (needlessly) duplicated that effort.  (not especially thoughtful/good)

    All here remain, "in the dark" as regards your, "try to set PB6 AMSEL bit."  Brevity may not be your, "best tech friend."

  • 0 in reply to Matthias Braband
    TI__Guru 58650 points

    Hi Matthias,

    Your configuration seems correct.  Can you please provide more details?

    • What values are you expecting and what are you receiving?
    • Have you tried varying the voltage attached the the VREF+ pin to see if the results change?
    Regards,
    Sue
  • 0 in reply to Sue Cozart
    Prodigy 30 points

    Hi Sue,

    I expect by a 3 V reference voltage on the VREF Pins and 3 V at some of the analog input pins values about 4095.

    I've tested this morning a configuration with changes in the reference voltage.

    The values I got by 3 V reference voltage are 3685 and by a reference voltage about 2,93 V are about 3765.

    I'm a bit worried about it because it seems that the vref pins are activated but I get also lower values than I expected.

    Best regards,

    Matthias

  • 0 in reply to Matthias Braband
    Guru 117855 points

    Matthias Braband said:
    values I got by 3 V reference voltage are 3685 and by a reference voltage about 2,93 V are about 3765.

    You present this data and solely note, "lower values than expected."  But - leaping forefront is the fact that 2.93V yields a higher ADC count than does 3.0V!!!   (may deserve "some" comment - unless you scrambled this data)

    Pardon but might you detail (via your code listing) just, "how you complied w/the errata listing" I found/presented w/in my initial post?  Those actual values you've presented strike me as if the MCU's reference is still "locked" at/around 3V3 (internal) - and the external Ref has not been fully/correctly asserted.  (or worse...)

  • 0 in reply to cb1_mobile
    TI__Guru 58650 points

    cb1 - I think what he is saying is that with a 3 V input voltage on the AINx pin, with a reference voltage of 3V, he gets 3685, but with a reference voltage of 2.93V, he gets 3765.  You would expect a higher result for the conversion with the same AINx voltage and a lower reference voltage, so I don't think his data is scrambled.

    Matthias -

    1. what is your input resistance on the AINx pin?  Note that the specification for this value is 500 Ohms max.
    2. What values do you get when you use the internal reference?
    Regards,
    Sue
  • 0 in reply to Sue Cozart
    Guru 117855 points

    Sue - you do make a good point - I clearly missed that (none too detailed) poster connection...

    However - should input to AINx equal VRef (and independent of VRef {w/in spec/reason} - I'd expect to see, "very close to full-scale" from that ADC.  Indeed - if the conversions are, "ratiometric" to the supplied VRef - I would not expect such variation...

    Update: dawns now that you believe he's held AINx @ 3.0V.  In that case - you are correct although it is not, "best practice" to allow AINx to exceed VRef.  (amount is slight - doubt harmful - but still far from ideal)  Devil is in the detail here - and the post's detail is insufficient imho...