External Pull-Down Resistor on USB VBUS

Prad,

Be careful to not draw too much current from the USB host VBUS while you are switched off.  I think 18K to gnd might be too much but you'd have to check the USB standard;  I don't remember off-hand what the max value is for a device that's suspended...

On the MCU side as long as the thresholds for the logic levels VIH, VIL are met then it will work properly.  You could check this using the min and max current numbers for the pulldown resistor on chip to see what the voltage at VBUSI would be with the circuit in figure 32-96.

Hi Anthony,

Thank you so much for the details.

One more clarification about the recommended Vbus connection.

"32.4.6.3 VBUS Monitoring for USB Function Controller" section in the manual
mentions the VBUS requires an external signal level shifter as below.

This input is a CMOS input that is not rated for the full VBUS range defined by the USB
specification. An external signal level shifter is required to convert the VBUS signal range to a range
suitable for the USB_VBUS pin.

But the "Figure 32-96" in the manual(below) mentions only about 100KΩ series resistor and a pulldown
capacitor for Vbus pin.there is no indication about the signal level shifter. Is this is a TYPO in the figure?
please let me know if there is any recommendation on the signal level shifter device.

Regards.
prad

Please let me know if there is any comment on the above.
As the VBUS is not 5V tolerant, we would like to know if there is anything
else that needs to be taken care for the USB levels?
will it be OK if we use a Resistor voltage divider to provide the necessary voltage on the VBUS pin.

Hi Anthony,

Thank you so much for the information.
Just to inform you, it seems there is no "signal level shifter" for
the USB device on the schematics of HDK Development Kit(RM48 HDK).

Regards.

Thanks for pointing this out Prad.

The above schematic I think is relying on the ESD clamp diode that's on all the pins and will turn on when VI goes above VCCIO.  We allow under absolute max conditions a limited amount of current to flow through this path.    While it 'works' for the HDK its is not an acceptable practice as it is outside our recommended operating conditions for the part.

So please take the above circuit as an example *not* to follow.   I'll alert the schematic owner to see if he'll add a note.

Hi Anthony,

Thank you for the confirmation.
I am sorry for bothering you, I couldn't understand few things in the spreadsheet.

The Contraints mentions
"USBvbusmax . (R2x1.05/(R1x0.95 +R2x1.05)) < MCUvihmax - 0.2V"

Does "R2x1.05,R1x0.95" means 5% Tolerance?
and regarding "MCUvihmax - 0.2V" I couldn't understand why "0.2".

Best Regards.
Prad

Hi Prad,

Prad1 said:

Does "R2x1.05,R1x0.95" means 5% Tolerance?

Yes, I probably could have made this cleaner by putting the 0.05 factor as a variable, but that's the idea.

Prad1 said:

regarding "MCUvihmax - 0.2V" I couldn't understand why "0.2".

Just some extra margin so that in the worst case tolerances, we should be 200mV away from the spec point.  You can adjust as you see fit.

Hi Anthony,

Thank you.

Just in case I would like know what could be the effect of internal resistor.
As you know there is a permanent internal pull-down resistance(20uA=164Kohm?) on the VBUSI pin.

As per our discussion above if we use pull-up and pull-down resistor (instead of 100KΩ series resistor)
to provide the necesary logic levels for the VBUSI pin, will there be any effects from the internal resistor?
will it be ok if we choose a strong pull-down resistor < 164Kohm?

Regards.
Prad

Prad,

In the equation for the min voltage, I included the term -Iimax*R1 to account for the pull down of the internal resistor.

I didn't use the term for the max voltage, because I wanted to make sure the pin met the max VCC spec even if the pull gets disabled by software.