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DAT_INV_PAR field of FPAR_OVR Register in TMS570LS0432 device

Pashan None
Genius 5660 points


Hello Support,

From the description of DAT_INV_PAR field in FPAR_OVR register within spnu517a.pdf, I am understanding the following :

Assuming all other necessary setup is correct along with ECC programmed correctly

DAT_INV_PAR  -- any two bits [ONLY] within this BYTE if SET will always create Double Bit ECC Error
                             -- any one bit [ONLY] if SET within this BYTE will always create Single Bit ECC Error
                             -- more than two bits if SET within this BYTE will create any error or no error [because multi-bit error is not guranteed by SECDED design within Cortex-R4 core ECC Logic]

Can you please confirm if my understanding is correct for all the above mentioned conditions?

Thank you.
Regards
Pashan

  • 0
    TI__Guru**** 191886 points

    Hello Pashan,

      To use the DAT_INV_PAR for ECC diagnostic you will need to make use of the diagnostic mode 7 of the flash wrapper. In order to use diagnostic mode 7 you will need to make sure that DIAG_MODE = 7, the PAR_OVR_KEY = 5, DIAG_EN_KEY = 5 and the access is a slave access. I want to elaborate a bit on the slave access. As you know the flash is a TCM memory starting from address 0x0. As you will also see in the device datasheet, you will note that the flash also has a mirror address starting at 0x2000_0000. A read from this space will generate a bus transaction on the CPU's AXI-M interface. This transction will be routed to the AXI-S (slave interface) via the device's interconnect. Eventually the transaction is routed from the AXI-S interface to the ATCM interface as a DMA transaction. The flash wrapper will only recognize a DMA transaction for testing diagnostic mode 7. This is using CPU to generate a fake DMA transaction for the purpose of diagnostic test. So make sure that you don't have any real DMA transactions accessing the flash at the same time while you are in diagnostic mode 7.

      You will then refer to the below diagram on which bit you want to corrupt. The diagram is another view of the syndrome table. The value you put into DAT_INV_PAR will be XORed with the current ECC to give a bad ECC value to the CPU. For example if you look at the diagram, the syndrome calculation depends on the data bit 62 for ECC bits 6,5,4 or 0x70. You will put 0x70 into DAT_INV_PAR to make CPU ECC logic thinks that the bit 62 is bad. If you want to make CPU think that bit 0 is bad you will put 0xCE into DAT_INV_PAR.

    regards,

    Charles