Hello,
Every time I execute the stcCheck during boot, the test causes a reset (it is supposed to do that, so that's ok), but when I check the TEST_FAIL bit, the bit is always set, meaning that the stcCheck failed.
When I check the STCFSTAT to see what happened, it indicates a CPU 1 fail and CPU2 fail, which is caused by comparing the MISR registers with the golden MISR stored in ROM.
Any ideas about waht could be doing this?