Tiva (TM4C1233H6PM) DMA connection to bitband region / alias?

Hello Julian,

The uDMA handles memory transfers as well (bit banding aliases are memory regions).  If you can provide some information on what you are trying to accomplish then maybe we can see if there is good solution.

Thanks,

-c

Hello Craig,

thanks for your quick reply.
I want to enable/disable a timer (used as counter) by DMA transfer to achieve fast start and stop which is requestet by an external signal (This part is already working).

So far I did write the whole timer CTL register by DMA. This works but I have to take care of changes in the CTL register to make sure the DMA only changes the TIMER_CTL_TAEN-bit. This is even more important when using the timer in split mode because I don't want the other timer to be concerned by the transfer.

Now my intention is to use bit-banding so I don't have to think about the rest of the CTL register.
This is how I configured the DMA to achieve a write to the bit-band alias (I am using software request for the test . The timer peripheral has been enabled before):


void ConfigureSWReqDMAtoBitband (void *destAddr, uint8_t bitNumber)
{
    uint32_t ui32Source;
    void *pDest;

    //
    // Calculate the bit-band address
    //
    pDest = (void*) (((uint32_t)(destAddr) & 0xF0000000) | 0x02000000 | (((uint32_t)(destAddr) & 0x000FFFFF) << 5) | ((bitNumber) << 2));

    //
    // Set 'true' value for the single bit that should be set
    //
    ui32Source = 0x1;

    //
    // Enable the uDMA peripheral
    //
    SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

    //
    // Enable the uDMA controller.
    //
    uDMAEnable();
    //
    // Set the base for the channel control table.
    //
    uDMAControlBaseSet(&pui8DMAControlTable[0]);
    //
    // No attributes must be set for a software-based transfer. The attributes
    // are cleared by default, but are explicitly cleared here, in case they
    // were set elsewhere.
    //
    uDMAChannelAttributeDisable(UDMA_CHANNEL_SW, UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST | UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK);
    //
    // Now set up the characteristics of the transfer for 32-bit data size.
    // A bus arbitration size of 32 is used.
    //
    uDMAChannelControlSet(UDMA_CHANNEL_SW | UDMA_PRI_SELECT,
    UDMA_SIZE_32 | UDMA_SRC_INC_NONE |
    UDMA_DST_INC_NONE | UDMA_ARB_32);
    //
    // The transfer buffers and transfer size are now configured. The transfer
    // uses AUTO mode, which means that the transfer automatically runs to
    // completion after the first request.
    //
    uDMAChannelTransferSet(UDMA_CHANNEL_SW | UDMA_PRI_SELECT,
    UDMA_MODE_AUTO, &ui32Source, pDest, 4);
    //
    // Finally, the channel must be enabled. Because this is a software-
    // initiated transfer, a request must also be made. The request starts the
    // transfer.
    //
    uDMAChannelEnable(UDMA_CHANNEL_SW);
    uDMAChannelRequest(UDMA_CHANNEL_SW);
}

For the destAddr parameter I use (TIMER0_BASE + TIMER_O_CTL) and bitNumber is zero (timer a enable). The resulting address for the bit-band alias is 0x42600180.
A HWREG access to it works fine but the DMA does not seem to change anything...

I realize that his is probably just a test function, but ui32Source should be static or global so it doesn't end up on the stack and "disappear" at the end of the function.

That's a good point. I made it static but it seems this wasn't the only problem, it still doesn't work...

Julian S said:

A HWREG access to it works fine but the DMA does not seem to change anything

The Tiva datasheets describe write accesses to bit-banded regions as being performed by read-modify-write. I can't find a definitive definition if the bit-banded access is only available to the Cortex-M4F processor core, or is also available to the DMA controller. Hence the suggestion to check if the DMA controller reports a bus error when it attempts to write to a bit-banded destination address.

I added and registered the DMA error interrupt handler and yes, it is triggered.

uDMAErrorStatusGet() returns 0x1 then.

I guess this means the bit-band alias is not available to the DMA controller.