problems about EMIF of TMS570LS3137

Hello Jiaming,

I have forwarded your post to one of our EMIF experts. They should get back to you on your observations in short while.

Do you have any suggestiongs? I did test again today ,and I found if I write data to DPAM in FPGA ,it works.If I write data to FIFO ,that means I write number of data to one address,it only write last data.I need solving this problem quickly ,could you reply me soon?

Jiaming,

In the FPGA, have you tried qualifying the write with the byte-write signal.  I believe the extra writes might assert EMIF_nWE but won't assert EMIF_nDQM[1:0] when there is no data to write.  (not 100% sure of this but maybe 90%).

So you might try making your equation for writing to the FIFO require:

 EMIF_nCS[] = '0' and EMIF_nWE = '0' and EMIF_nDQM[1] = '0' and EMIF_nDQM[0] = '0'

assuming you are only doing 16-bit writes to the FIFO.  IF you're doing 8 bit then you'd drop one of the DQM's from the equation.    

Jiaming,

What do you configure your EMIF memory attribute?  Is it normal or device or strongly order?

If you have it in normal mode, i would suggest that you put the memory attribute in device or strongly order mode.

Also, do you have any other bus master accessing the EMIF during this time?