i am used two rm48 board communicatin whih mibspi(whithout DMA). but i cant receive data. i need simple example about mibspi5. i am from china. please send code to my email zhouranvip@sina.com.1856.MIBSPI5_slave.rar5861.MIBSPI5_master.zip
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i am used two rm48 board communicatin whih mibspi(whithout DMA). but i cant receive data. i need simple example about mibspi5. i am from china. please send code to my email zhouranvip@sina.com.1856.MIBSPI5_slave.rar5861.MIBSPI5_master.zip
Hi Ron Chow,
I tried to compile the project you had attached in the query and i am getting some compile errors. Can you let know the compiler version you are using? And the list of changes you had done to the base halcogen code? I see some differences between your code and halcogen code, like in the mibspi.c at PC0 registers where only some of the pins are configured as SPI functional pins..
Regards,
Praveen
i use halcogen version 03.06.00,ccs5.30.
the list is my changes based on default halcogen:
1. enable mibspi5 in pinmux (and also set corresponing hardware in board,i succeed to communicate between two spi5)
2. in master board i enable master mode and internal clock ,while disable enable master mode and internal clock in slave board.
3. i enable mibspi5 driver
4. the other is default.
i use wire line the mibspi5 pin:
master slave
clock ---------clock
cs0------------cs0
somi0--------somi0
simo0-------simo0
i also noticed that not all pin are set functional but i set also item(chocice ) in functional in halcogen. meanwhile,i am confused default chip select oxFF,because i only used cs0.
Maybe This fault can be about multi buffer size. Your buffer size is 8 but , rx buffer size 16 in mibspiGetData function.
Hi Ron Chow,
Regarding your question on 'meanwhile,i am confused default chip select oxFF,because i only used cs0.' The CSDEF defines the Chip select default pattern ie). the polarity of the chip select during the idle state.
Having said that, i observe in the projects you had attached, that the CSDEF is programmed differently for master and slave. Can you leave it to 0xFF for slave and try if the transfer is working?
Regards,
Praveen
Hi Ron Chow,
Please find the example attached below:
3823.MIBSPI_MASTER_SLAVE_4Pin_CS0.zip
Couple of things you may have to note, if you are using RM48 as MIBSPI slave:
- Run the slave code first and then start the master code.
- The C2TDELAY configuration in Master has to be configured to a high value(as in the attached example), for the MIBSPI slave to trigger the transfer
Please let us know, if you have any more queries.
Regards,
Praveen